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authorkensun <kensun@google.com>2023-08-02 14:27:51 +0000
committerKen Sun <kensun@google.com>2023-08-11 05:50:55 +0000
commitd124620c19a9a34d485f73bfaf50fb5793a598bd (patch)
treeb8f9e1d555fe5e5123258d69313364b48fa1bc5e
parentc3c4e4c047ed08e709a4051bfcf9beb9b71d72ab (diff)
downloadbcm4398-d124620c19a9a34d485f73bfaf50fb5793a598bd.tar.gz
wifi: only enable big core in high speed condition.
Prevent CPU8 gets used in low Tput condition for better CPU power efficiency. Bug: 291262209 Test: RvR results are inlined with base ROM Change-Id: I04e260ef3f9459434b7aebca2f73aea8f7659e03
-rw-r--r--dhd_linux_lb.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/dhd_linux_lb.c b/dhd_linux_lb.c
index 70db890..c237e19 100644
--- a/dhd_linux_lb.c
+++ b/dhd_linux_lb.c
@@ -23,6 +23,7 @@
*/
#include <dhd_linux_priv.h>
+#include <dhd_plat.h>
extern dhd_pub_t* g_dhd_pub;
@@ -194,6 +195,7 @@ void dhd_select_cpu_candidacy(dhd_info_t *dhd)
uint32 tx_cpu = 0; /* cpu selected for tx processing job */
uint32 dpc_cpu = atomic_read(&dhd->dpc_cpu);
uint32 net_tx_cpu = atomic_read(&dhd->net_tx_cpu);
+ bool use_big_core = dhd_plat_pcie_enable_big_core();
cpumask_clear(dhd->cpumask_set8_new);
cpumask_clear(dhd->cpumask_set4_new);
@@ -223,7 +225,10 @@ void dhd_select_cpu_candidacy(dhd_info_t *dhd)
cpumask_clear_cpu(net_tx_cpu, dhd->cpumask_set4_new);
cpumask_clear_cpu(net_tx_cpu, dhd->cpumask_set0_new);
- set8_available_cpus = cpumask_weight(dhd->cpumask_set8_new);
+ if (use_big_core)
+ set8_available_cpus = cpumask_weight(dhd->cpumask_set8_new);
+ else
+ set8_available_cpus = 0;
set4_available_cpus = cpumask_weight(dhd->cpumask_set4_new);
DHD_INFO(("%s select cpu from set4/8\n", __FUNCTION__));