diff options
| author | Salman Nabi <salman.nabi@arm.com> | 2024-02-19 16:50:05 +0000 |
|---|---|---|
| committer | Salman Nabi <salman.nabi@arm.com> | 2024-05-08 15:50:58 +0200 |
| commit | 48932c3c278b2f4a7cdbf5a63350b333a9f5355c (patch) | |
| tree | a7cc02517c282ffa0c020e63bb66aa23ba9586a5 | |
| parent | 9edf08b17707a43f5d627fb1255e0bf2067f33e6 (diff) | |
| download | arm-trusted-firmware-48932c3c278b2f4a7cdbf5a63350b333a9f5355c.tar.gz | |
refactor(xilinx): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are
no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME)
and console_flush() calls and make them the last calls in bl31_main()
(before BL31 exits). Until then they are being left as the last calls
in bl31_plat_runtime_setup() for testing before refactoring.
This patch affects Xilinx SoCs only.
Change-Id: Iea4cf920934bbde4312f40c8c7b3e0f56a316e86
Signed-off-by: Salman Nabi <salman.nabi@arm.com>
| -rw-r--r-- | plat/xilinx/versal/bl31_versal_setup.c | 3 | ||||
| -rw-r--r-- | plat/xilinx/versal_net/bl31_versal_net_setup.c | 3 | ||||
| -rw-r--r-- | plat/xilinx/zynqmp/bl31_zynqmp_setup.c | 3 |
3 files changed, 6 insertions, 3 deletions
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c index d19a263b8..f2f9e30cd 100644 --- a/plat/xilinx/versal/bl31_versal_setup.c +++ b/plat/xilinx/versal/bl31_versal_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * @@ -207,6 +207,7 @@ void bl31_plat_runtime_setup(void) panic(); } + console_flush(); console_switch_state(CONSOLE_FLAG_RUNTIME); } diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c index 614d6d233..421c8171c 100644 --- a/plat/xilinx/versal_net/bl31_versal_net_setup.c +++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * @@ -232,6 +232,7 @@ void bl31_plat_runtime_setup(void) panic(); } + console_flush(); console_switch_state(CONSOLE_FLAG_RUNTIME); } diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index baf67170a..9f4fff979 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -191,6 +191,7 @@ void bl31_plat_runtime_setup(void) custom_runtime_setup(); + console_flush(); console_switch_state(CONSOLE_FLAG_RUNTIME); } |