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authorBruce Beare <bruce.j.beare@intel.com>2016-02-03 00:08:59 +0000
committerandroid-build-merger <android-build-merger@google.com>2016-02-03 00:08:59 +0000
commitdcd3a47151be069980bfcf24f7aa874e12bb4c11 (patch)
tree456f51b23830d06448e941e6ef5d38806606aef6
parente499ad11c72eaef3367303155216f7d52e389af8 (diff)
parent6b1611a178516c059b80b1fecb9bbea070a00d0d (diff)
downloadintel-dcd3a47151be069980bfcf24f7aa874e12bb4c11.tar.gz
libmraa: sync wih upstream (SHA1: 8b68f3)
am: 6b1611a178 * commit '6b1611a178516c059b80b1fecb9bbea070a00d0d': libmraa: sync wih upstream (SHA1: 8b68f3)
-rw-r--r--peripheral/libmraa/Android.mk2
-rw-r--r--peripheral/libmraa/CMakeLists.txt30
-rw-r--r--peripheral/libmraa/README.md5
-rw-r--r--peripheral/libmraa/api/mraa/common.h12
-rw-r--r--peripheral/libmraa/api/mraa/common.hpp13
-rw-r--r--peripheral/libmraa/api/mraa/gpio.h6
-rw-r--r--peripheral/libmraa/api/mraa/gpio.hpp34
-rw-r--r--peripheral/libmraa/api/mraa/iio.h139
-rw-r--r--peripheral/libmraa/api/mraa/iio.hpp245
-rw-r--r--peripheral/libmraa/api/mraa/iio_kernel_headers.h136
-rw-r--r--peripheral/libmraa/api/mraa/types.h2
-rw-r--r--peripheral/libmraa/api/mraa/uart.hpp1
-rw-r--r--peripheral/libmraa/cmake/modules/TargetArch.cmake4
-rw-r--r--peripheral/libmraa/docs/building.md2
-rw-r--r--peripheral/libmraa/docs/changelog.md205
-rw-r--r--peripheral/libmraa/docs/edison.md4
-rw-r--r--peripheral/libmraa/docs/ftdi_ft4222.md70
-rw-r--r--peripheral/libmraa/docs/iio.md44
-rw-r--r--peripheral/libmraa/docs/index.java.md3
-rw-r--r--peripheral/libmraa/docs/index.md196
-rw-r--r--peripheral/libmraa/examples/CMakeLists.txt2
-rw-r--r--peripheral/libmraa/examples/blink_onboard.c2
-rw-r--r--peripheral/libmraa/examples/c++/CMakeLists.txt4
-rw-r--r--peripheral/libmraa/examples/c++/Iio-dummy.cpp157
-rw-r--r--peripheral/libmraa/examples/hellomraa.c2
-rw-r--r--peripheral/libmraa/examples/iio_driver.c145
-rw-r--r--peripheral/libmraa/examples/java/Isr.java7
-rw-r--r--peripheral/libmraa/examples/javascript/Blink-IO.js5
-rw-r--r--peripheral/libmraa/examples/mraa-i2c.c2
-rw-r--r--peripheral/libmraa/examples/python/uart_receiver.py (renamed from peripheral/libmraa/examples/python/uart.py)24
-rw-r--r--peripheral/libmraa/examples/python/uart_sender.py57
-rw-r--r--peripheral/libmraa/include/arm/96boards.h48
-rw-r--r--peripheral/libmraa/include/mraa_adv_func.h2
-rw-r--r--peripheral/libmraa/include/mraa_func.h51
-rw-r--r--peripheral/libmraa/include/mraa_internal.h9
-rw-r--r--peripheral/libmraa/include/mraa_internal_types.h28
-rw-r--r--peripheral/libmraa/include/x86/intel_minnow_byt_compatible.h2
-rw-r--r--peripheral/libmraa/include/x86/intel_sofia_3gr.h39
-rw-r--r--peripheral/libmraa/src/CMakeLists.txt9
-rw-r--r--peripheral/libmraa/src/aio/aio.c2
-rw-r--r--peripheral/libmraa/src/arm/96boards.c132
-rw-r--r--peripheral/libmraa/src/arm/arm.c16
-rw-r--r--peripheral/libmraa/src/arm/banana.c2
-rw-r--r--peripheral/libmraa/src/arm/beaglebone.c6
-rw-r--r--peripheral/libmraa/src/arm/raspberry_pi.c6
-rw-r--r--peripheral/libmraa/src/gpio/gpio.c68
-rw-r--r--peripheral/libmraa/src/i2c/i2c.c27
-rw-r--r--peripheral/libmraa/src/iio/iio.c654
-rw-r--r--peripheral/libmraa/src/java/CMakeLists.txt7
-rw-r--r--peripheral/libmraa/src/java/mraajava.i10
-rw-r--r--peripheral/libmraa/src/javascript/binding.gyp.cmake2
-rw-r--r--peripheral/libmraa/src/javascript/mraajs.i17
-rw-r--r--peripheral/libmraa/src/mraa.c139
-rw-r--r--peripheral/libmraa/src/mraa.i1
-rw-r--r--peripheral/libmraa/src/mraajava.pc.cmake11
-rw-r--r--peripheral/libmraa/src/pwm/pwm.c2
-rw-r--r--peripheral/libmraa/src/python/docs/example.rst20
-rw-r--r--peripheral/libmraa/src/spi/spi.c48
-rw-r--r--peripheral/libmraa/src/uart/uart.c48
-rw-r--r--peripheral/libmraa/src/usb/ftdi_ft4222.c451
-rw-r--r--peripheral/libmraa/src/x86/intel_de3815.c2
-rw-r--r--peripheral/libmraa/src/x86/intel_edison_fab_c.c8
-rw-r--r--peripheral/libmraa/src/x86/intel_galileo_rev_d.c2
-rw-r--r--peripheral/libmraa/src/x86/intel_galileo_rev_g.c2
-rw-r--r--peripheral/libmraa/src/x86/intel_minnow_byt_compatible.c9
-rw-r--r--peripheral/libmraa/src/x86/intel_nuc5.c2
-rw-r--r--peripheral/libmraa/src/x86/intel_sofia_3gr.c103
-rw-r--r--peripheral/libmraa/src/x86/x86.c32
-rw-r--r--peripheral/libmraa/tests/CMakeLists.txt23
-rw-r--r--peripheral/libmraa/tests/check_clean.py23
-rw-r--r--peripheral/libmraa/tests/check_samplenames.py64
71 files changed, 3076 insertions, 611 deletions
diff --git a/peripheral/libmraa/Android.mk b/peripheral/libmraa/Android.mk
index 57ad298..43bc38d 100644
--- a/peripheral/libmraa/Android.mk
+++ b/peripheral/libmraa/Android.mk
@@ -28,11 +28,13 @@ LOCAL_SRC_FILES := \
src/aio/aio.c \
src/uart/uart.c \
src/x86/x86.c \
+ src/iio/iio.c \
src/x86/intel_galileo_rev_d.c \
src/x86/intel_galileo_rev_g.c \
src/x86/intel_edison_fab_c.c \
src/x86/intel_de3815.c \
src/x86/intel_nuc5.c \
+ src/x86/intel_sofia_3gr.c \
src/x86/intel_minnow_byt_compatible.c
# glob.c pulled in from NetBSD project (BSD 3-clause License)
diff --git a/peripheral/libmraa/CMakeLists.txt b/peripheral/libmraa/CMakeLists.txt
index 8bc536f..490d720 100644
--- a/peripheral/libmraa/CMakeLists.txt
+++ b/peripheral/libmraa/CMakeLists.txt
@@ -1,5 +1,5 @@
cmake_minimum_required (VERSION 2.8)
-project (mraa)
+project (mraa C)
FIND_PACKAGE (Threads REQUIRED)
@@ -10,6 +10,13 @@ set (LIB_INSTALL_DIR "${CMAKE_INSTALL_LIBDIR}" CACHE PATH "Installation path for
# Set CMAKE_LIB_INSTALL_DIR if not defined
include(GNUInstallDirs)
+# By default, build shared object libraries on linux
+if (UNIX AND NOT APPLE)
+ if (NOT DEFINED BUILD_SHARED_LIBS)
+ set(BUILD_SHARED_LIBS ON)
+ endif()
+endif()
+
# Appends the cmake/modules path to MAKE_MODULE_PATH variable.
set (CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_MODULE_PATH})
@@ -18,7 +25,7 @@ include (GetGitRevisionDescription)
git_describe (VERSION "--tags")
if ("x_${VERSION}" STREQUAL "x_GIT-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_HEAD-HASH-NOTFOUND" OR "x_${VERSION}" STREQUAL "x_-128-NOTFOUND")
message (WARNING " - Install git to compile a production libmraa!")
- set (VERSION "v0.8.1-dirty")
+ set (VERSION "v0.9.0-dirty")
endif ()
message (INFO " - libmraa Version ${VERSION}")
@@ -58,11 +65,11 @@ option (USBPLAT "Detection USB platform." OFF)
option (FTDI4222 "Build with FTDI FT4222 subplatform support." OFF)
option (IPK "Generate IPK using CPack" OFF)
option (RPM "Generate RPM using CPack" OFF)
-option (BUILDPYTHON3 "Use python3 for building/installing" OFF)
+option (BUILDPYTHON3 "Use python3 for building/installing/testing" OFF)
option (ENABLEEXAMPLES "Disable building of examples" ON)
option (INSTALLGPIOTOOL "Install gpio tool" OFF)
option (BUILDARCH "Override architecture to build for - override" OFF)
-option (TESTS "Override the addition of tests" ON)
+option (BUILDTESTS "Override the addition of tests" ON)
set (MRAAPLATFORMFORCE "" CACHE STRING "ALL")
@@ -90,19 +97,13 @@ else ()
message(FATAL_ERROR "Only x86 and arm platforms currently supported")
endif()
-if (BUILDSWIGPYTHON)
+if (BUILDSWIGPYTHON OR BUILDTESTS)
if (BUILDPYTHON3)
set (PYTHONBUILD_VERSION 3)
else ()
set (PYTHONBUILD_VERSION 2.7)
endif ()
find_package (PythonInterp ${PYTHONBUILD_VERSION} REQUIRED)
- if (TESTS)
- if (${PYTHONINTERP_FOUND})
- enable_testing ()
- add_subdirectory (tests)
- endif ()
- endif ()
endif ()
if (BUILDDOC)
@@ -185,3 +186,10 @@ add_subdirectory (src)
if (ENABLEEXAMPLES)
add_subdirectory (examples)
endif ()
+
+if (BUILDTESTS)
+ if (${PYTHONINTERP_FOUND})
+ enable_testing ()
+ add_subdirectory (tests)
+ endif ()
+endif ()
diff --git a/peripheral/libmraa/README.md b/peripheral/libmraa/README.md
index 0faaf85..8449b42 100644
--- a/peripheral/libmraa/README.md
+++ b/peripheral/libmraa/README.md
@@ -89,3 +89,8 @@ API Documentation
<a href="http://java.mraa.io"><img src="http://iotdk.intel.com/misc/logos/java.png"/></a>
<a href="http://py.mraa.io"><img src="http://iotdk.intel.com/misc/logos/python.png"/></a>
<a href="http://js.mraa.io"><img src="http://iotdk.intel.com/misc/logos/node.png"/></a>
+
+Changelog
+=========
+
+Version changelog [here](docs/changelog.md).
diff --git a/peripheral/libmraa/api/mraa/common.h b/peripheral/libmraa/api/mraa/common.h
index ef67c49..0357f0c 100644
--- a/peripheral/libmraa/api/mraa/common.h
+++ b/peripheral/libmraa/api/mraa/common.h
@@ -140,7 +140,17 @@ mraa_result_t mraa_set_log_level(int level);
*
* @return platform name
*/
-char* mraa_get_platform_name();
+const char* mraa_get_platform_name();
+
+/**
+ * Return the platform's versioning info, the information given depends per
+ * platform and can be NULL. platform_offset has to be given. Do not modify
+ * this pointer
+ *
+ * @param specified platform offset; 0 for main platform, 1 for sub platform
+ * @return platform's versioning string
+ */
+const char* mraa_get_platform_version(int platform_offset);
/**
* This function attempts to set the mraa process to a given priority and the
diff --git a/peripheral/libmraa/api/mraa/common.hpp b/peripheral/libmraa/api/mraa/common.hpp
index 6c5552c..832cedb 100644
--- a/peripheral/libmraa/api/mraa/common.hpp
+++ b/peripheral/libmraa/api/mraa/common.hpp
@@ -155,6 +155,19 @@ getPlatformName()
}
/**
+ * Return platform versioning info. Returns NULL if no info present.
+ *
+ * @param optional subplatform identifier
+ * @return platform versioning info
+ */
+inline std::string
+getPlatformVersion(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
+{
+ std::string ret_val(mraa_get_platform_version(platform_offset));
+ return ret_val;
+}
+
+/**
* Return count of physical pins on the running platform
*
* @return uint of physical pins.
diff --git a/peripheral/libmraa/api/mraa/gpio.h b/peripheral/libmraa/api/mraa/gpio.h
index 895d537..2168f50 100644
--- a/peripheral/libmraa/api/mraa/gpio.h
+++ b/peripheral/libmraa/api/mraa/gpio.h
@@ -44,6 +44,12 @@ extern "C" {
#include <Python.h>
#endif
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+#include <jni.h>
+extern JavaVM *globVM;
+extern void mraa_java_isr_callback(void *);
+#endif
+
#include <stdio.h>
#include <pthread.h>
diff --git a/peripheral/libmraa/api/mraa/gpio.hpp b/peripheral/libmraa/api/mraa/gpio.hpp
index b578463..ec9c43a 100644
--- a/peripheral/libmraa/api/mraa/gpio.hpp
+++ b/peripheral/libmraa/api/mraa/gpio.hpp
@@ -69,30 +69,6 @@ typedef enum {
EDGE_FALLING = 3 /**< Interupt on falling only */
} Edge;
-#if defined(SWIGJAVA)
-
-class IsrCallback
-{
- friend class Gpio;
- public:
- virtual ~IsrCallback()
- {
- }
- virtual void
- run()
- { /* empty, overloaded in Java*/
- }
-
- protected:
- static void
- generic_isr_callback(void* data)
- {
- IsrCallback* callback = (IsrCallback*) data;
- callback->run();
- }
-};
-#endif
-
/**
* @brief API to General Purpose IO
*
@@ -196,13 +172,13 @@ class Gpio
#endif
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &uvwork, this);
}
-#elif defined(SWIGJAVA)
+#elif defined(SWIGJAVA) || defined(JAVACALLBACK)
Result
- isr(Edge mode, IsrCallback* cb)
+ isr(Edge mode, jobject runnable)
{
- return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &IsrCallback::generic_isr_callback, cb);
+ return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, mraa_java_isr_callback, runnable);
}
-#else
+#endif
/**
* Sets a callback to be called when pin value changes
*
@@ -217,7 +193,7 @@ class Gpio
{
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, fptr, args);
}
-#endif
+
/**
* Exits callback - this call will not kill the isr thread immediatly
* but only when it is out of it's critical section
diff --git a/peripheral/libmraa/api/mraa/iio.h b/peripheral/libmraa/api/mraa/iio.h
new file mode 100644
index 0000000..eadbab9
--- /dev/null
+++ b/peripheral/libmraa/api/mraa/iio.h
@@ -0,0 +1,139 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common.h"
+#include "iio_kernel_headers.h"
+
+typedef struct {
+ int index;
+ int enabled;
+ char* type;
+ mraa_boolean_t lendian;
+ int signedd;
+ unsigned int offset;
+ uint64_t mask;
+ unsigned int bits_used;
+ unsigned int bytes;
+ unsigned int shift;
+ unsigned int location;
+} mraa_iio_channel;
+
+typedef struct {
+ char* name;
+ int enabled;
+} mraa_iio_event;
+
+/**
+ * @file
+ * @brief iio
+ *
+ * An iio context represents an IIO device
+ *
+ * @snippet iio_driver.c Interesting
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <stdint.h>
+
+#include "common.h"
+
+/**
+ * Opaque pointer definition to the internal struct _iio
+ */
+typedef struct _iio* mraa_iio_context;
+
+/**
+ * Initialise iio context
+ *
+ * @param bus iio device to use
+ * @return i2c context or NULL
+ */
+mraa_iio_context mraa_iio_init(int device);
+
+mraa_result_t mraa_iio_trigger_buffer(mraa_iio_context dev, void (*fptr)(char* data), void* args);
+
+const char* mraa_iio_get_device_name(mraa_iio_context dev);
+
+int mraa_iio_get_device_num_by_name(const char* name);
+
+int mraa_iio_read_size(mraa_iio_context dev);
+
+mraa_iio_channel* mraa_iio_get_channels(mraa_iio_context dev);
+
+int mraa_iio_get_channel_count(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_read_float(mraa_iio_context dev, const char* filename, float* data);
+
+mraa_result_t mraa_iio_read_int(mraa_iio_context dev, const char* filename, int* data);
+
+mraa_result_t mraa_iio_read_string(mraa_iio_context dev, const char* filename, char* data, int max_len);
+
+mraa_result_t mraa_iio_write_float(mraa_iio_context dev, const char* attr_chan, const float data);
+
+mraa_result_t mraa_iio_write_int(mraa_iio_context dev, const char* attr_chan, const int data);
+
+mraa_result_t mraa_iio_write_string(mraa_iio_context dev, const char* attr_chan, const char* data);
+
+mraa_result_t mraa_iio_get_channel_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_get_event_data(mraa_iio_context dev);
+
+mraa_result_t mraa_iio_event_poll(mraa_iio_context dev, struct iio_event_data* data);
+
+mraa_result_t
+mraa_iio_event_setup_callback(mraa_iio_context dev, void (*fptr)(struct iio_event_data* data, void* args), void* args);
+
+mraa_result_t mraa_iio_event_extract_event(struct iio_event_data* event,
+ int* chan_type,
+ int* modifier,
+ int* type,
+ int* direction,
+ int* channel,
+ int* channel2,
+ int* different);
+
+mraa_result_t mraa_iio_get_mounting_matrix(mraa_iio_context dev, float mm[9]);
+
+mraa_result_t mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger);
+
+mraa_result_t mraa_iio_update_channels(mraa_iio_context dev);
+/**
+ * De-inits an mraa_iio_context device
+ *
+ * @param dev The iio context
+ * @return Result of operation
+ */
+mraa_result_t mraa_iio_close(mraa_iio_context dev);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/peripheral/libmraa/api/mraa/iio.hpp b/peripheral/libmraa/api/mraa/iio.hpp
new file mode 100644
index 0000000..9cfbb18
--- /dev/null
+++ b/peripheral/libmraa/api/mraa/iio.hpp
@@ -0,0 +1,245 @@
+/*
+ * Author: Henry Bruce <henry.bruce@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <stdexcept>
+ #include <sstream>
+#include "iio.h"
+#include "types.hpp"
+
+namespace mraa
+{
+
+struct IioEventData
+{
+ int channelType;
+ int modifier;
+ int type;
+ int direction;
+ int channel;
+ int channel2;
+ int diff;
+};
+
+class IioHandler
+{
+public:
+ virtual void onIioEvent(const IioEventData& eventData) = 0;
+};
+
+
+/**
+ * @brief API to Industrial IO
+ *
+ * This file defines the C++ iio interface for libmraa
+ *
+ * @snippet iio_dummy_test.cpp Interesting
+ */
+class Iio
+{
+ public:
+ /**
+ * Iio Constructor, takes a device number which will map directly to sysfs
+ * e.g. device 0 maps to /sys/bus/iio/devices/iio:device0
+ *
+ * @param device IIO device number
+ *
+ * @throws std::invalid_argument if initialization fails
+ */
+ Iio(int device)
+ {
+ m_iio = mraa_iio_init(device);
+ if (m_iio == NULL) {
+ std::ostringstream oss;
+ oss << "IIO device " << device << " is not valid";
+ throw std::invalid_argument(oss.str());
+ }
+ }
+
+ /**
+ * Iio Constructor
+ *
+ * @param deviceName IIO device name
+ *
+ * @throws std::invalid_argument if initialization fails
+ */
+ Iio(const std::string& deviceName)
+ {
+ std::ostringstream oss;
+ int id = mraa_iio_get_device_num_by_name(deviceName.c_str());
+ if (id == -1) {
+ oss << "IIO device name " << deviceName << " not found";
+ throw std::invalid_argument(oss.str());
+ }
+ m_iio = mraa_iio_init(id);
+ if (m_iio == NULL) {
+ oss << "IIO device " << deviceName << " is not valid";
+ throw std::invalid_argument(oss.str());
+ }
+ }
+
+ /**
+ * Iio destructor
+ */
+ ~Iio()
+ {
+ mraa_iio_close(m_iio);
+ }
+
+
+ /**
+ * Get device name
+ *
+ * @returns The device name
+ */
+ std::string
+ getDeviceName() const
+ {
+ return mraa_iio_get_device_name(m_iio);
+ }
+
+ /**
+ * Read an int value from specified attribute.
+ *
+ * @param attributeName attribute mame
+ *
+ * @returns The int value
+ *
+ * @throws std::invalid_argument if read fails
+ */
+ int
+ readInt(const std::string& attributeName) const
+ {
+ int value;
+ mraa_result_t res = mraa_iio_read_int(m_iio, attributeName.c_str(), &value);
+ if (res != MRAA_SUCCESS) {
+ std::ostringstream oss;
+ oss << "IIO readInt for attibute " << attributeName << " failed";
+ throw std::runtime_error(oss.str());
+ }
+ return value;
+ }
+
+ /**
+ * Read a float value from specified attribute.
+ *
+ * @param attributeName attribute mame
+ *
+ * @returns The float value
+ *
+ * @throws std::invalid_argument if read fails
+ */
+ float
+ readFloat(const std::string& attributeName) const
+ {
+ float value;
+ mraa_result_t res = mraa_iio_read_float(m_iio, attributeName.c_str(), &value);
+ if (res != MRAA_SUCCESS) {
+ std::ostringstream oss;
+ oss << "IIO readFloat for attibute " << attributeName << " failed";
+ throw std::runtime_error(oss.str());
+ }
+ return value;
+ }
+
+ /**
+ * Write an int value to specified attribute.
+ *
+ * @param attributeName attribute mame
+ * @param value int value
+ *
+ * @throws std::invalid_argument if write fails
+ */
+ void
+ writeInt(const std::string& attributeName, int value) const
+ {
+ mraa_result_t res = mraa_iio_write_int(m_iio, attributeName.c_str(), value);
+ if (res != MRAA_SUCCESS) {
+ std::ostringstream oss;
+ oss << "IIO writeInt for attibute " << attributeName << " failed";
+ throw std::runtime_error(oss.str());
+ }
+
+ }
+
+ /**
+ * Write a float value to specified attribute.
+ *
+ * @param attributeName attribute mame
+ * @param value float value
+ *
+ * @throws std::invalid_argument if write fails
+ */
+ void
+ writeFloat(const std::string& attributeName, float value) const
+ {
+ mraa_result_t res = mraa_iio_write_float(m_iio, attributeName.c_str(), value);
+ if (res != MRAA_SUCCESS) {
+ std::ostringstream oss;
+ oss << "IIO writeFloat for attibute " << attributeName << " failed";
+ throw std::runtime_error(oss.str());
+ }
+
+ }
+
+ /**
+ * Register event handler.
+ *
+ * @param handler handler class that implements IioHandler
+ *
+ * @throws std::invalid_argument on failure
+ */
+ void
+ registerEventHandler(IioHandler* handler) const
+ {
+ mraa_result_t res = mraa_iio_event_setup_callback(m_iio, private_event_handler, handler);
+ if (res != MRAA_SUCCESS) {
+ throw std::runtime_error("registerEventHandler failed");
+ }
+ }
+
+ private:
+ static void private_event_handler(iio_event_data* data, void *args)
+ {
+ if (args != NULL) {
+ IioHandler* handler = (IioHandler*)args;
+ IioEventData eventData;
+ int chan_type, modifier, type, direction, channel, channel2, different;
+ mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
+ eventData.channelType = chan_type;
+ eventData.modifier = modifier;
+ eventData.type = type;
+ eventData.direction = direction;
+ eventData.channel = channel;
+ eventData.channel2 = channel2;
+ eventData.diff = different;
+ handler->onIioEvent(eventData);
+ }
+ }
+
+ mraa_iio_context m_iio;
+};
+
+}
diff --git a/peripheral/libmraa/api/mraa/iio_kernel_headers.h b/peripheral/libmraa/api/mraa/iio_kernel_headers.h
new file mode 100644
index 0000000..5fbe81f
--- /dev/null
+++ b/peripheral/libmraa/api/mraa/iio_kernel_headers.h
@@ -0,0 +1,136 @@
+/*
+ * Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+//For kernel 4.1+,
+//#include <linux/iio/types.h>
+//#include <linux/iio/events.h>
+
+//linux/iio/types.h
+enum iio_chan_type {
+ IIO_VOLTAGE,
+ IIO_CURRENT,
+ IIO_POWER,
+ IIO_ACCEL,
+ IIO_ANGL_VEL,
+ IIO_MAGN,
+ IIO_LIGHT,
+ IIO_INTENSITY,
+ IIO_PROXIMITY,
+ IIO_TEMP,
+ IIO_INCLI,
+ IIO_ROT,
+ IIO_ANGL,
+ IIO_TIMESTAMP,
+ IIO_CAPACITANCE,
+ IIO_ALTVOLTAGE,
+ IIO_CCT,
+ IIO_PRESSURE,
+ IIO_HUMIDITYRELATIVE,
+ IIO_ACTIVITY,
+ IIO_STEPS,
+ IIO_ENERGY,
+ IIO_DISTANCE,
+ IIO_VELOCITY,
+};
+
+enum iio_modifier {
+ IIO_NO_MOD,
+ IIO_MOD_X,
+ IIO_MOD_Y,
+ IIO_MOD_Z,
+ IIO_MOD_X_AND_Y,
+ IIO_MOD_X_AND_Z,
+ IIO_MOD_Y_AND_Z,
+ IIO_MOD_X_AND_Y_AND_Z,
+ IIO_MOD_X_OR_Y,
+ IIO_MOD_X_OR_Z,
+ IIO_MOD_Y_OR_Z,
+ IIO_MOD_X_OR_Y_OR_Z,
+ IIO_MOD_LIGHT_BOTH,
+ IIO_MOD_LIGHT_IR,
+ IIO_MOD_ROOT_SUM_SQUARED_X_Y,
+ IIO_MOD_SUM_SQUARED_X_Y_Z,
+ IIO_MOD_LIGHT_CLEAR,
+ IIO_MOD_LIGHT_RED,
+ IIO_MOD_LIGHT_GREEN,
+ IIO_MOD_LIGHT_BLUE,
+ IIO_MOD_QUATERNION,
+ IIO_MOD_TEMP_AMBIENT,
+ IIO_MOD_TEMP_OBJECT,
+ IIO_MOD_NORTH_MAGN,
+ IIO_MOD_NORTH_TRUE,
+ IIO_MOD_NORTH_MAGN_TILT_COMP,
+ IIO_MOD_NORTH_TRUE_TILT_COMP,
+ IIO_MOD_RUNNING,
+ IIO_MOD_JOGGING,
+ IIO_MOD_WALKING,
+ IIO_MOD_STILL,
+ IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
+};
+
+enum iio_event_type {
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_TYPE_MAG,
+ IIO_EV_TYPE_ROC,
+ IIO_EV_TYPE_THRESH_ADAPTIVE,
+ IIO_EV_TYPE_MAG_ADAPTIVE,
+ IIO_EV_TYPE_CHANGE,
+};
+
+enum iio_event_direction {
+ IIO_EV_DIR_EITHER,
+ IIO_EV_DIR_RISING,
+ IIO_EV_DIR_FALLING,
+ IIO_EV_DIR_NONE,
+};
+
+//linux/iio/events.h
+#include <linux/ioctl.h>
+
+/**
+ * struct iio_event_data - The actual event being pushed to userspace
+ * @id: event identifier
+ * @timestamp: best estimate of time of event occurrence (often from
+ * the interrupt handler)
+ */
+struct iio_event_data {
+ unsigned long long int id;
+ long long int timestamp;
+};
+
+#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+
+#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
+
+#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
+
+#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
+
+/* Event code number extraction depends on which type of event we have.
+ * Perhaps review this function in the future*/
+#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((short int)(mask & 0xFFFF))
+#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((short int)(((mask) >> 16) & 0xFFFF))
+
+#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
+#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)
diff --git a/peripheral/libmraa/api/mraa/types.h b/peripheral/libmraa/api/mraa/types.h
index 5d42eac..27c489d 100644
--- a/peripheral/libmraa/api/mraa/types.h
+++ b/peripheral/libmraa/api/mraa/types.h
@@ -46,6 +46,8 @@ typedef enum {
MRAA_BEAGLEBONE = 6, /**< The different BeagleBone Black Modes B/C */
MRAA_BANANA = 7, /**< Allwinner A20 based Banana Pi and Banana Pro */
MRAA_INTEL_NUC5 = 8, /**< The Intel 5th generations Broadwell NUCs */
+ MRAA_96BOARDS = 9, /**< Linaro 96boards */
+ MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
diff --git a/peripheral/libmraa/api/mraa/uart.hpp b/peripheral/libmraa/api/mraa/uart.hpp
index 9099d5b..cc485a3 100644
--- a/peripheral/libmraa/api/mraa/uart.hpp
+++ b/peripheral/libmraa/api/mraa/uart.hpp
@@ -28,6 +28,7 @@
#include "uart.h"
#include "types.hpp"
+#include <stdlib.h>
#include <stdexcept>
#include <cstring>
diff --git a/peripheral/libmraa/cmake/modules/TargetArch.cmake b/peripheral/libmraa/cmake/modules/TargetArch.cmake
index 1e9c759..f20ee87 100644
--- a/peripheral/libmraa/cmake/modules/TargetArch.cmake
+++ b/peripheral/libmraa/cmake/modules/TargetArch.cmake
@@ -13,7 +13,9 @@
# "There are many more known variants/revisions that we do not handle/detect."
set(archdetect_c_code "
-#if defined(__arm__) || defined(__TARGET_ARCH_ARM)
+#if defined(__aarch64__)
+ #error cmake_ARCH armv8
+#elif defined(__arm__) || defined(__TARGET_ARCH_ARM)
#if defined(__ARM_ARCH_7__) \\
|| defined(__ARM_ARCH_7A__) \\
|| defined(__ARM_ARCH_7R__) \\
diff --git a/peripheral/libmraa/docs/building.md b/peripheral/libmraa/docs/building.md
index f74dd66..208ad37 100644
--- a/peripheral/libmraa/docs/building.md
+++ b/peripheral/libmraa/docs/building.md
@@ -164,6 +164,8 @@ To run, make sure `libmraajava.so` is in `LD_LIBRARY_PATH`
jave -cp $DIR_WHERE_YOU_INSTALLED_MRAA/mraa.jar:. Example
~~~~~~~~~~~~~
+If you want to add or improve Java bindings for mraa, please follow the [Creating Java Bindings Guide](https://github.com/intel-iot-devkit/upm/blob/master/docs/creating_java_bindings.md).
+
## Building an IPK/RPM package using `cpack`
You can get `cpack` to generate an IPK or RPM package fairly easily if you have
diff --git a/peripheral/libmraa/docs/changelog.md b/peripheral/libmraa/docs/changelog.md
new file mode 100644
index 0000000..77e2601
--- /dev/null
+++ b/peripheral/libmraa/docs/changelog.md
@@ -0,0 +1,205 @@
+Changelog {#changelog}
+=========
+
+This changelog is meant as a quick & rough guide to what has changed between
+versions. The API is now fairly stable but when new calls/features are added
+they are listed here. Anything pre 0.2.x is ignored.
+
+**0.9.0**
+ * Beta iio API in C & C++ (no SWIG support)
+ * Added 96Board support
+ * Added Brillo/Android support
+ * Java ISR fixes
+ * FT4222 gpio support
+
+**0.8.1**
+ * Nodejs 4.1.1 support
+ * Java examples fixes
+ * Nodejs SPI tweaks
+ * Misc fixes
+
+**0.8.0**
+ * Better java support
+ * Support for FT4222 subplatforms
+ * New types.hpp improves C++ & SWIG APIs
+ * Added support for minnowboard max compatible boards
+
+**0.7.5**
+ * 5th Generation NUC i2c support
+ * NPM 0.10.x ia32 fix
+
+**0.7.4**
+ * Minnowboard i2c fix
+ * Add NPM arm support
+ * Uart initialisation improved
+ * Better i2c bus detection on DE3815 & mmax
+
+**0.7.3**
+ * DE3815 i2c fix when using different kernels
+ * Fixed various memory leaks in SWIG wrappers
+ * gpio enums all prefixed with mraa_
+ * Fix SPI CS pin caps causing mux_total to be > 0
+ * Improved error checking/handling
+
+**0.7.2**
+ * Fix node.js npm builds with binding.gyp that didn't use --target-arch
+
+**0.7.1**
+ * Uart now uses binary arrays and has optional 'Str' functions in C++/SWIG
+ * Various Uart module bugfixes
+ * Node.js 0.12.4 support
+ * Node.js documentation support
+
+**0.7.0**
+ * Uart module now contains read/write interactions and configuration
+ * Python API contains more buffer checks
+ * Java support
+ * RPM cpack support
+
+**0.6.2**
+ * Node.js 0.12 support
+ * NPM support
+ * Formatting done with clang-format
+ * Various examples and documentation updates
+ * Supported added for Beaglebone Black + Banana Pi
+
+**0.6.1**
+ * 16bit spi iunctions added
+ * Node.js ISR now supported
+
+**0.6.0**
+ * add device path queries for uart
+ * add platform configuration querying
+ * gpio sample added
+ * improve i2c/spi write/read API for python & nodejs
+ * performance improvements on edison & galileo
+
+**0.5.4**
+ * pwm read_* fix introduced in 0.5.3
+ * improved npmpkg support
+
+**0.5.3**
+ * OE toolchain support added to CMake
+ * Various UART fixes
+ * SPI add CS exposure
+ * Remove functions from mraa.c into modules
+ * Rework of support for mmap
+ * Intel Edison MMAP support added. Read and Write
+ * I2C clean up, add cleaner functions
+ * MinnowBoard Max support added
+ * PWM period is written before duty
+ * Node GYP build supported added
+ * Add Get Platform Name function
+
+**0.5.2**
+ * pwm improvement & bugfix
+ * spi mraa_spi_bit_per_word fix
+ * new spi transfer function
+ * i2c object api uses uint8_t
+ * i2c readReg() calls added
+ * edison i2c bus now defaults to a sensible value
+ * edison uart enable support
+ * edison hardware CS exposed as IO10
+ * DE3815tykhe NUC support
+
+**0.5.1**
+ * Intel Edison - Mini breakout board support
+ * Change to use syslog throughout instead of printing to stderr.
+ * Fix misc issues brought up throuh coverity scans
+ * Clear up Analog call documentation
+
+**0.5.0**
+ * Intel Edison - Arduino board support.
+ * Boost Allowable i2c busses to 12
+ * Additional platform hooks added
+ * ADC is now 10bits by default on all platforms but can be changed
+
+**0.4.5**
+ * if only one spidev we default to it reguardless of number
+ * mraa_pwm_config_ms & mraa_pwm_config_percent functions added
+ * Uart C++ class added, adds python & node support
+ * galileo gen2 gpio modes supported
+
+**0.4.4**
+ * prefix SPI mode with MRAA_SPI_
+ * added C++ adc bitness calls
+
+**0.4.3**
+ * SPI Mode function now functional, API Change in SPI
+ * I2C read in swig worked on.
+ * Galileo Gen 2: PWM setting period sets all channel's period
+ * Galileo Gen 2: I2C setup now specific to Gen 2.
+ * General commits around freeing memory at the right times.
+
+**0.4.2**
+ * Barebone UART module added.
+ * Hook branch merged.
+ * I2C init hooks added.
+ * Intel Galileo Gen 2, I2C gpio pins now go hiz input when I2C initialised.
+
+**0.4.1**
+ * Rename python & nodejs modules to mraa
+ * common.hpp introduced for C++
+ * python & nodejs modules can now take binary strings for Spi & I2c
+ * improved Aio module and clear bitness
+ * Improved Galileo Gen 2 support
+
+**0.4.0**
+ * Rename to mraa
+ * get_platform_type function added.
+
+**0.3.1**
+ * Initial Intel Galileo Gen 2 support
+ * mraa_gpio_isr parameters added.
+ * Detection of different supported platforms added.
+
+**0.3.0**
+ * mraa_i2c_read now returns length of read
+
+**0.2.9**
+ * Add global mraa.h & mraa.hpp headers
+ * usage of "gpio.h" is not legal you need to use "mraa/gpio.h" unless adding
+ -L/usr/include/mraa
+
+**0.2.8**
+ * Added mraa_set_priority call
+ * Added mmap gpio call mraa_gpio_use_mmaped
+
+**0.2.7**
+ * C++ API now uses basic types and not unistd types as C
+ * Clearer and consistent use of unistd tpyes in C api
+
+**0.2.6**
+ * C++ examples added, using c++ headers/api.
+ * moved to open instead of fopen in all modules
+ * rename mraa_check functions and made them internal to mraa only.
+ * removed "export" functions from api
+ * Intel Galileo Gen 1 (rev d) fixes, incorrect definition of some items
+ * SPI, implementation completed.
+ * I2C internal function, completed.
+ * PWM fix bug in period set method.
+ * Swig upstream can be used for building.
+ * No longer builds docs on default cmake, needs flag
+ * GPIO/PWM ownership guard prevents closing on existing pins, still can be forced.
+
+**0.2.5**
+ * C++/Python/Node Enums/const names now do not contain MRAA_GPIO
+ * Enum type declaration for C++ changed
+ * Python/Node get_version() -> GetVersion()
+ * i2c read calls don't use const char* and i2c write calls do
+
+**0.2.4**
+ * All mraa_ contexts now are pointers to the actual struct which is not
+ delcared in the header. The only end user change is that instead of
+ returning a type mraa_gpio_context pointer mraa_gpio_init() now returns a
+ mraa_gpio_context (which is actually a pointer to struct _gpio internally).
+ * C++ API is available, use the .hpp headers and add stdc++ to the linker
+ flags.
+ * Initial SPI implementation is provided
+
+**0.2.3**
+ * mraa_aio_read_u16() -> mraa_aio_read()
+ * mraa_aio_read() now returns a uint16_t instead of an unsigned int
+
+**0.2.2**
+ * First version with API considered 'stable'
diff --git a/peripheral/libmraa/docs/edison.md b/peripheral/libmraa/docs/edison.md
index b493905..0d262b3 100644
--- a/peripheral/libmraa/docs/edison.md
+++ b/peripheral/libmraa/docs/edison.md
@@ -31,6 +31,10 @@ in libmraa:
else. Therefore use `mraa_gpio_init(14)` to use A0 as a GPIO
- Arduino pin 7 can sometimes negatively impact the WiFi capability, if using
WiFi avoid using this pin
+- Edison's i2c-1 can be used using for example the sparkfun i2c breakout ontop
+ of the Arduino breakout board, this is not supported officially so asking for
+ mraa_i2c_init(1) will result in getting i2c bus 6 (the default one). However
+ using raw mode (mraa_i2c_init_raw(1)) this bus is fully usable
Because of the way IO is setup with the tristate on the Arduino breakout board
IO will be flipped as it is setup. It's recommended to setup IO pins &
diff --git a/peripheral/libmraa/docs/ftdi_ft4222.md b/peripheral/libmraa/docs/ftdi_ft4222.md
index d54cc3b..ca1b980 100644
--- a/peripheral/libmraa/docs/ftdi_ft4222.md
+++ b/peripheral/libmraa/docs/ftdi_ft4222.md
@@ -5,15 +5,65 @@ The FT4222H is a High/Full Speed USB2.0-to-Quad SPI/I2C device controller. Mraa
supports it as a USB subplatform using the libft4222 library from FTDI which
can be found
[here](http://www.ftdichip.com/Support/SoftwareExamples/libft4222-1.2.1.4.tgz).
-You need the latest version for the GPIO to work
+You need the latest version for the GPIO to work.
-The FT 4222H has 4 configuration modes selected by {DCNF1, DCNF0}. The c hip
-configuration mode will determine the number of USB interface s for data stream
-s and for GPIOs control. Mraa supports only chip CNFMODE0.
+The FT4222H has 4 configuration modes selected by {DCNF1, DCNF0}. The chip
+configuration mode will determine the number of USB interfaces for data streams
+and for GPIOs control. Mraa supports chip modes CNFMODE0 and CNFMODE3. In
+CNFMODE0 the chip can provide either 4 GPIOs and SPI, or 2 GPIOs and I2C
+since SCL/SDA are shared with GPIO0/GPIO1. It is possible to change this
+selection dynamically by calling the corresponding mraa init functions.
+CNFMODE3 on the other hand will only provide SPI or I2C.
-Whilst mraa can support custom board in CNFMODE0 (support for other mode is
-welcome!) there may be some work to be done. We test using FTDI's UNFT4222EV
-reference board. More detail on this board can be found
+By default, both modes start with I2C enabled and the driver will scan for
+known GPIO expanders on the I2C bus when the FT4222H is initialized.
+
+Supported GPIO expanders:
+* PCA9672
+* PCA9555
+* PCF8575
+
+Output from 'mraa-gpio list' would be as follows:
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514 INT-GPIO2: GPIO
+515 INT-GPIO3: GPIO
+~~~~~~~~~~~~~
+
+When an I2C GPIO expander is present, the pins on the expander will appear after
+the 4 FT4222H GPIO pins (i.e. starting at physical pin #4, logical pin #516).
+~~~~~~~~~~~~~
+512 IGPIO0/SCL0: GPIO I2C
+513 IGPIO1/SDA0: GPIO I2C
+514 INT-GPIO2: GPIO
+515 INT-GPIO3: GPIO
+516 EXP-GPIO0: GPIO
+517 EXP-GPIO1: GPIO
+518 EXP-GPIO2: GPIO
+519 EXP-GPIO3: GPIO
+520 EXP-GPIO4: GPIO
+521 EXP-GPIO5: GPIO
+522 EXP-GPIO6: GPIO
+523 EXP-GPIO7: GPIO
+~~~~~~~~~~~~~
+
+If a PCA9545 I2C switch is detected an extra four I2C busses will appear,
+representing the four downstream busses. Output from 'mraa-i2c list'
+would be as follows:
+~~~~~~~~~~~~~
+Bus 512: id=00 type=ft4222 default
+Bus 513: id=01 type=ft4222
+Bus 514: id=02 type=ft4222
+Bus 515: id=03 type=ft4222
+Bus 516: id=04 type=ft4222
+~~~~~~~~~~~~~
+
+Please note that some mraa features might not be fully implemented yet and they
+are still under development (e.g. SPI replacement functions).
+
+We tested the module using FTDI's UMFT4222EV reference board. More details on
+this board can be found
[here](http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_UMFT4222EV.pdf).
Interface notes
@@ -22,3 +72,9 @@ Interface notes
You will need to unload all ftdi kernel modules for libft4222 to work
correctly. You will also have to compile mraa with FT4222 support which may not
be enabled by default.
+
+The cmake options to build this driver are:
+~~~~~~~~~~~~~
+FTDI4222=ON
+USBPLAT=ON
+~~~~~~~~~~~~~
diff --git a/peripheral/libmraa/docs/iio.md b/peripheral/libmraa/docs/iio.md
new file mode 100644
index 0000000..0f419a2
--- /dev/null
+++ b/peripheral/libmraa/docs/iio.md
@@ -0,0 +1,44 @@
+iio {#iio}
+===
+IIO is the kernel's framework for supporting sensors.
+## Using dummy_iio driver
+For platforms without IIO hardware the iio_dummy driver can be used. You can
+add the driver by either rebuilding the kernel with IIO component enabled or
+just building the IIO modules and load them. You must add the following config
+fragment. Known to work for kernel 3.19 and later.
+<pre><code>
+CONFIG_IIO_DUMMY_EVGEN=m
+CONFIG_IIO_SIMPLE_DUMMY=m
+CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y
+CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y
+</code></pre>
+### Add driver to kernel
+Boot with new kernel, then load modules
+<pre><code>
+$ modprobe iio_dummy
+$ modprobe iio_dummy_evgen
+</code></pre>
+### Load kernel modules
+Depending our your kernel config, some of these modules may already be loaded.
+<pre><code>
+$ insmod drivers/iio/industrialio.ko
+$ insmod drivers/iio/kfifo_buf.ko
+$ insmod drivers/staging/iio/iio_dummy_evgen.ko
+$ insmod drivers/staging/iio/iio_dummy.ko
+</code></pre>
+## 'RAW' access
+
+Mraa supports raw access
+
+###Channels
+
+###Attributes
+
+###Events
+
+###Triggers
+
+Activate the trigger in /sys/class/iio
+$ echo 1 > trigger0/trigger_now
+
+
diff --git a/peripheral/libmraa/docs/index.java.md b/peripheral/libmraa/docs/index.java.md
index 3912383..0207414 100644
--- a/peripheral/libmraa/docs/index.java.md
+++ b/peripheral/libmraa/docs/index.java.md
@@ -64,3 +64,6 @@ More information on compiling is @ref building page.
Please see the @ref contributing page, the @ref internals page may also be of
use.
+## API Changelog
+
+Version @ref changelog here.
diff --git a/peripheral/libmraa/docs/index.md b/peripheral/libmraa/docs/index.md
index a762afd..50f87da 100644
--- a/peripheral/libmraa/docs/index.md
+++ b/peripheral/libmraa/docs/index.md
@@ -66,198 +66,4 @@ use.
## API Changelog
-This changelog is meant as a quick & rough guide to what has changed between
-versions. The API is now fairly stable but when new calls/features are added
-they are listed here. Anything pre 0.2.x is ignored.
-
-**0.8.1**
- * Nodejs 4.1.1 support
- * Java examples fixes
- * Nodejs SPI tweaks
- * Misc fixes
-
-**0.8.0**
- * Better java support
- * Support for FT4222 subplatforms
- * New types.hpp improves C++ & SWIG APIs
- * Added support for minnowboard max compatible boards
-
-**0.7.5**
- * 5th Generation NUC i2c support
- * NPM 0.10.x ia32 fix
-
-**0.7.4**
- * Minnowboard i2c fix
- * Add NPM arm support
- * Uart initialisation improved
- * Better i2c bus detection on DE3815 & mmax
-
-**0.7.3**
- * DE3815 i2c fix when using different kernels
- * Fixed various memory leaks in SWIG wrappers
- * gpio enums all prefixed with mraa_
- * Fix SPI CS pin caps causing mux_total to be > 0
- * Improved error checking/handling
-
-**0.7.2**
- * Fix node.js npm builds with binding.gyp that didn't use --target-arch
-
-**0.7.1**
- * Uart now uses binary arrays and has optional 'Str' functions in C++/SWIG
- * Various Uart module bugfixes
- * Node.js 0.12.4 support
- * Node.js documentation support
-
-**0.7.0**
- * Uart module now contains read/write interactions and configuration
- * Python API contains more buffer checks
- * Java support
- * RPM cpack support
-
-**0.6.2**
- * Node.js 0.12 support
- * NPM support
- * Formatting done with clang-format
- * Various examples and documentation updates
- * Supported added for Beaglebone Black + Banana Pi
-
-**0.6.1**
- * 16bit spi iunctions added
- * Node.js ISR now supported
-
-**0.6.0**
- * add device path queries for uart
- * add platform configuration querying
- * gpio sample added
- * improve i2c/spi write/read API for python & nodejs
- * performance improvements on edison & galileo
-
-**0.5.4**
- * pwm read_* fix introduced in 0.5.3
- * improved npmpkg support
-
-**0.5.3**
- * OE toolchain support added to CMake
- * Various UART fixes
- * SPI add CS exposure
- * Remove functions from mraa.c into modules
- * Rework of support for mmap
- * Intel Edison MMAP support added. Read and Write
- * I2C clean up, add cleaner functions
- * MinnowBoard Max support added
- * PWM period is written before duty
- * Node GYP build supported added
- * Add Get Platform Name function
-
-**0.5.2**
- * pwm improvement & bugfix
- * spi mraa_spi_bit_per_word fix
- * new spi transfer function
- * i2c object api uses uint8_t
- * i2c readReg() calls added
- * edison i2c bus now defaults to a sensible value
- * edison uart enable support
- * edison hardware CS exposed as IO10
- * DE3815tykhe NUC support
-
-**0.5.1**
- * Intel Edison - Mini breakout board support
- * Change to use syslog throughout instead of printing to stderr.
- * Fix misc issues brought up throuh coverity scans
- * Clear up Analog call documentation
-
-**0.5.0**
- * Intel Edison - Arduino board support.
- * Boost Allowable i2c busses to 12
- * Additional platform hooks added
- * ADC is now 10bits by default on all platforms but can be changed
-
-**0.4.5**
- * if only one spidev we default to it reguardless of number
- * mraa_pwm_config_ms & mraa_pwm_config_percent functions added
- * Uart C++ class added, adds python & node support
- * galileo gen2 gpio modes supported
-
-**0.4.4**
- * prefix SPI mode with MRAA_SPI_
- * added C++ adc bitness calls
-
-**0.4.3**
- * SPI Mode function now functional, API Change in SPI
- * I2C read in swig worked on.
- * Galileo Gen 2: PWM setting period sets all channel's period
- * Galileo Gen 2: I2C setup now specific to Gen 2.
- * General commits around freeing memory at the right times.
-
-**0.4.2**
- * Barebone UART module added.
- * Hook branch merged.
- * I2C init hooks added.
- * Intel Galileo Gen 2, I2C gpio pins now go hiz input when I2C initialised.
-
-**0.4.1**
- * Rename python & nodejs modules to mraa
- * common.hpp introduced for C++
- * python & nodejs modules can now take binary strings for Spi & I2c
- * improved Aio module and clear bitness
- * Improved Galileo Gen 2 support
-
-**0.4.0**
- * Rename to mraa
- * get_platform_type function added.
-
-**0.3.1**
- * Initial Intel Galileo Gen 2 support
- * mraa_gpio_isr parameters added.
- * Detection of different supported platforms added.
-
-**0.3.0**
- * mraa_i2c_read now returns length of read
-
-**0.2.9**
- * Add global mraa.h & mraa.hpp headers
- * usage of "gpio.h" is not legal you need to use "mraa/gpio.h" unless adding
- -L/usr/include/mraa
-
-**0.2.8**
- * Added mraa_set_priority call
- * Added mmap gpio call mraa_gpio_use_mmaped
-
-**0.2.7**
- * C++ API now uses basic types and not unistd types as C
- * Clearer and consistent use of unistd tpyes in C api
-
-**0.2.6**
- * C++ examples added, using c++ headers/api.
- * moved to open instead of fopen in all modules
- * rename mraa_check functions and made them internal to mraa only.
- * removed "export" functions from api
- * Intel Galileo Gen 1 (rev d) fixes, incorrect definition of some items
- * SPI, implementation completed.
- * I2C internal function, completed.
- * PWM fix bug in period set method.
- * Swig upstream can be used for building.
- * No longer builds docs on default cmake, needs flag
- * GPIO/PWM ownership guard prevents closing on existing pins, still can be forced.
-
-**0.2.5**
- * C++/Python/Node Enums/const names now do not contain MRAA_GPIO
- * Enum type declaration for C++ changed
- * Python/Node get_version() -> GetVersion()
- * i2c read calls don't use const char* and i2c write calls do
-
-**0.2.4**
- * All mraa_ contexts now are pointers to the actual struct which is not
- delcared in the header. The only end user change is that instead of
- returning a type mraa_gpio_context pointer mraa_gpio_init() now returns a
- mraa_gpio_context (which is actually a pointer to struct _gpio internally).
- * C++ API is available, use the .hpp headers and add stdc++ to the linker
- flags.
- * Initial SPI implementation is provided
-
-**0.2.3**
- * mraa_aio_read_u16() -> mraa_aio_read()
- * mraa_aio_read() now returns a uint16_t instead of an unsigned int
-
-**0.2.2**
- * First version with API considered 'stable'
+Version @ref changelog here.
diff --git a/peripheral/libmraa/examples/CMakeLists.txt b/peripheral/libmraa/examples/CMakeLists.txt
index 5ca1431..c0df374 100644
--- a/peripheral/libmraa/examples/CMakeLists.txt
+++ b/peripheral/libmraa/examples/CMakeLists.txt
@@ -12,6 +12,7 @@ add_executable (uart uart.c)
add_executable (mraa-gpio mraa-gpio.c)
add_executable (mraa-i2c mraa-i2c.c)
add_executable (spi_max7219 spi_max7219.c)
+add_executable (iio_driver iio_driver.c)
include_directories(${PROJECT_SOURCE_DIR}/api)
# FIXME Hack to access mraa internal types used by mraa-i2c
@@ -32,6 +33,7 @@ target_link_libraries (uart mraa)
target_link_libraries (mraa-gpio mraa)
target_link_libraries (mraa-i2c mraa)
target_link_libraries (spi_max7219 mraa)
+target_link_libraries (iio_driver mraa)
add_subdirectory (c++)
diff --git a/peripheral/libmraa/examples/blink_onboard.c b/peripheral/libmraa/examples/blink_onboard.c
index 6750ca1..b955e23 100644
--- a/peripheral/libmraa/examples/blink_onboard.c
+++ b/peripheral/libmraa/examples/blink_onboard.c
@@ -33,7 +33,7 @@ main(int argc, char** argv)
{
mraa_platform_t platform = mraa_get_platform_type();
mraa_gpio_context gpio, gpio_in = NULL;
- char* board_name = mraa_get_platform_name();
+ const char* board_name = mraa_get_platform_name();
int ledstate = 0;
switch (platform) {
diff --git a/peripheral/libmraa/examples/c++/CMakeLists.txt b/peripheral/libmraa/examples/c++/CMakeLists.txt
index b33af78..d688d48 100644
--- a/peripheral/libmraa/examples/c++/CMakeLists.txt
+++ b/peripheral/libmraa/examples/c++/CMakeLists.txt
@@ -1,3 +1,5 @@
+enable_language(CXX)
+
add_executable (AioA0 AioA0.cpp)
add_executable (blink-io-cpp Blink-IO.cpp)
add_executable (Pwm3-cycle Pwm3-cycle.cpp)
@@ -5,6 +7,7 @@ add_executable (I2c-compass I2c-compass.cpp)
add_executable (Spi-pot Spi-pot.cpp)
add_executable (Uart Uart-example.cpp)
add_executable (Isr-pin6 Isr-pin6.cpp)
+add_executable (Iio-dummy Iio-dummy.cpp)
include_directories(${PROJECT_SOURCE_DIR}/api)
@@ -15,3 +18,4 @@ target_link_libraries (I2c-compass mraa stdc++ m)
target_link_libraries (Spi-pot mraa stdc++)
target_link_libraries (Uart mraa stdc++)
target_link_libraries (Isr-pin6 mraa stdc++)
+target_link_libraries (Iio-dummy mraa stdc++)
diff --git a/peripheral/libmraa/examples/c++/Iio-dummy.cpp b/peripheral/libmraa/examples/c++/Iio-dummy.cpp
new file mode 100644
index 0000000..0672ec3
--- /dev/null
+++ b/peripheral/libmraa/examples/c++/Iio-dummy.cpp
@@ -0,0 +1,157 @@
+/*
+ * Author: Henry Bruce
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include <iostream>
+#include <math.h>
+#include <float.h>
+#include "mraa/iio.hpp"
+
+#define EXPECT_FAILURE 0
+#define EXPECT_SUCCESS 1
+
+#define IIO_TRY(func) \
+{ \
+ bool success = true; \
+ try { \
+ iio_device->func; \
+ } catch (std::exception& e) { \
+ success = false; \
+ } \
+ log_result(#func, "", true, success); \
+}
+
+// Macro to run IIO method on attribute and log output
+#define IIO_RUN(func, attr, value, expect) \
+{ \
+ std::string attr_name = attr; \
+ bool success = true; \
+ try { \
+ iio_device->func(attr_name, value); \
+ } catch (std::exception& e) { \
+ success = false; \
+ } \
+ log_result(#func, attr_name, expect, success); \
+}
+
+// Macro to run IIO method on attribute and check for expected result and log output
+#define IIO_TEST(func, attr, value, expect) \
+{ \
+ std::string attr_name = attr; \
+ bool success = false; \
+ try { \
+ success = fabs(iio_device->func(attr_name) - value) < FLT_EPSILON; \
+ } catch (std::exception& e) { \
+ success = false; \
+ } \
+ log_result(#func, attr_name, expect, success); \
+}
+
+mraa::Iio* iio_device;
+int eventCount = 0;
+
+// Log result of test. Note a "fail" (i.e. success is false) will be displayed as a pass if a fail was expected
+void log_result(std::string test_name, std::string attr_name, bool expect_success, bool success)
+{
+ std::string result;
+ if (expect_success)
+ result = success ? "PASS" : "FAIL";
+ else
+ result = success ? "FAIL" : "PASS";
+ if (attr_name.empty())
+ fprintf(stdout, "%s: %s\n", test_name.c_str(), result.c_str());
+ else
+ fprintf(stdout, "%s(%s): %s\n", test_name.c_str(), attr_name.c_str(), result.c_str());
+}
+
+// Generate iio_dummy driver event by writing a string to a specific sysfs node
+bool generate_event()
+{
+ FILE *fp = fopen("/sys/bus/iio/devices/iio_evgen/poke_ev0", "w");
+ if (fp == NULL)
+ return false;
+ fprintf(fp, "1\n");
+ fclose(fp);
+ return true;
+}
+
+
+// IIO event handler that checks for event from dummy_iio_evgen driver
+class IioTestHandler : public mraa::IioHandler
+{
+protected:
+ void onIioEvent(const mraa::IioEventData& eventData) {
+ if (eventData.channelType == IIO_VOLTAGE && eventData.direction == IIO_EV_DIR_RISING && eventData.type == IIO_EV_TYPE_THRESH)
+ eventCount++;
+ }
+};
+
+int
+main()
+{
+ IioTestHandler testHandler;
+ std::string deviceName;
+ try {
+ mraa::Iio* iio_device0 = new mraa::Iio(0);
+ std::cout << "IIO device 0 found by id." << std::endl;
+ deviceName = iio_device0->getDeviceName();
+ delete iio_device0;
+ } catch (std::exception& e) {
+ std::cerr << "IIO device 0 not found." << std::endl;
+ return EXIT_FAILURE;
+ }
+
+ try {
+ mraa::Iio* iio_device1 = new mraa::Iio(1);
+ delete iio_device1;
+ } catch (std::exception& e) {
+ std::cerr << "IIO device 1 not found. This is expected behavior." << std::endl;
+ }
+
+ try {
+ iio_device = new mraa::Iio(deviceName);
+ std::cout << "IIO device 0 found by name." << std::endl;
+ } catch (std::exception& e) {
+ std::cerr << "IIO device 0 not found." << std::endl;
+ return EXIT_FAILURE;
+ }
+
+
+ std::cout << "Using IIO device0. Name is " << iio_device->getDeviceName() << std::endl;
+ IIO_RUN(writeFloat, "in_accel_x_raw", 100, EXPECT_FAILURE);
+ IIO_RUN(writeFloat, "in_voltage0_scale", 100, EXPECT_FAILURE);
+ IIO_RUN(writeInt, "out_voltage0_raw", 100, EXPECT_SUCCESS);
+ IIO_TEST(readInt, "in_accel_x_raw", 34, EXPECT_SUCCESS);
+ IIO_TEST(readFloat, "in_voltage0_scale", 0.001333, EXPECT_SUCCESS);
+ IIO_RUN(writeInt, "events/in_voltage0_thresh_rising_en", 1, EXPECT_SUCCESS);
+ IIO_TRY(registerEventHandler(&testHandler));
+ eventCount = 0;
+ generate_event();
+ usleep(500000);
+ log_result("eventReceived", "", (eventCount == 1), true);
+
+ delete iio_device;
+ return EXIT_SUCCESS;
+}
+
diff --git a/peripheral/libmraa/examples/hellomraa.c b/peripheral/libmraa/examples/hellomraa.c
index 3a7bc9a..62a1ea1 100644
--- a/peripheral/libmraa/examples/hellomraa.c
+++ b/peripheral/libmraa/examples/hellomraa.c
@@ -31,7 +31,7 @@
int
main(int argc, char** argv)
{
- char* board_name = mraa_get_platform_name();
+ const char* board_name = mraa_get_platform_name();
int i2c_bus, i, i2c_adapter;
fprintf(stdout, "hello mraa\n Version: %s\n Running on %s\n", mraa_get_version(), board_name);
diff --git a/peripheral/libmraa/examples/iio_driver.c b/peripheral/libmraa/examples/iio_driver.c
new file mode 100644
index 0000000..824e0b1
--- /dev/null
+++ b/peripheral/libmraa/examples/iio_driver.c
@@ -0,0 +1,145 @@
+/*
+ * Author: Brendan Le Foll
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unistd.h>
+#include "mraa/iio.h"
+
+static void
+printword(uint16_t input, mraa_iio_channel* chan)
+{
+ int16_t res;
+
+ if (!chan->lendian) {
+ input = be16toh(input);
+ } else {
+ input = le16toh(input);
+ }
+
+ input >>= chan->shift;
+ input &= chan->mask;
+ if (chan->signedd) {
+ res = (int16_t)(input << (16 - chan->bits_used)) >> (16 - chan->bits_used);
+ } else {
+ res = input;
+ }
+ printf(" value = %05f\n", (float) res);
+}
+
+mraa_iio_context iio_device0;
+mraa_iio_context iio_device6;
+
+void
+interrupt(char* data)
+{
+ mraa_iio_channel* channels = mraa_iio_get_channels(iio_device0);
+ int i = 0;
+
+ for (i; i < mraa_iio_get_channel_count(iio_device0); i++) {
+ if (channels[i].enabled) {
+ printf("channel %d - bytes %d\n", channels[i].index, channels[i].bytes);
+ switch (channels[i].bytes) {
+ case 2:
+ printword(*(uint16_t*) (data + channels[i].location), &channels[i]);
+ }
+ }
+ }
+}
+
+void
+event_interrupt(struct iio_event_data* data)
+{
+ int chan_type;
+ int modifier;
+ int type;
+ int direction;
+ int channel;
+ int channel2;
+ int different;
+ mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
+
+ printf("event time %lld id %lld extracted chan_type %d modifier %d type %d direction %d "
+ "channel %d channel2 %d different %d\n",
+ data->timestamp, data->id, chan_type, modifier, type, direction, channel, channel2, different);
+}
+
+int
+main()
+{
+ //! [Interesting]
+ iio_device0 = mraa_iio_init(0);
+ if (iio_device0 == NULL) {
+ return EXIT_FAILURE;
+ }
+
+ float iio_float;
+ int iio_int;
+ mraa_result_t ret;
+
+ ret = mraa_iio_write_float(iio_device0, "in_accel_scale", 0.019163);
+ if (ret == MRAA_SUCCESS) {
+ fprintf(stdout, "IIO write success\n");
+ }
+
+ ret = mraa_iio_read_float(iio_device0, "in_accel_scale", &iio_float);
+ if (ret == MRAA_SUCCESS) {
+ fprintf(stdout, "IIO read %f\n", iio_float);
+ }
+
+ ret = mraa_iio_write_int(iio_device0, "scan_elements/in_accel_x_en", 1);
+ if (ret == MRAA_SUCCESS) {
+ fprintf(stdout, "IIO write success\n");
+ }
+
+ ret = mraa_iio_read_int(iio_device0, "scan_elements/in_accel_x_en", &iio_int);
+ if (ret == MRAA_SUCCESS) {
+ fprintf(stdout, "IIO read %d\n", iio_int);
+ }
+
+ if (mraa_iio_trigger_buffer(iio_device0, interrupt, NULL) == MRAA_SUCCESS) {
+ sleep(100);
+ return EXIT_SUCCESS;
+ }
+
+ /*
+ struct iio_event_data event;
+ iio_device6 = mraa_iio_init(6);
+ if (iio_device6 == NULL) {
+ return EXIT_FAILURE;
+ }
+ mraa_iio_write_int(iio_device6, "events/in_proximity2_thresh_either_en", 1);
+
+
+ // Blocking until event fired
+ if (mraa_iio_event_poll(iio_device6, &event) == MRAA_SUCCESS) {
+ event_interrupt(&event); //just to show data
+ }
+
+ if (mraa_iio_event_setup_callback(iio_device6, event_interrupt, NULL) == MRAA_SUCCESS) {
+ sleep(100);
+ return EXIT_SUCCESS;
+ }*/
+
+ //! [Interesting]
+ return EXIT_FAILURE;
+}
diff --git a/peripheral/libmraa/examples/java/Isr.java b/peripheral/libmraa/examples/java/Isr.java
index 6881bf5..72a1d3e 100644
--- a/peripheral/libmraa/examples/java/Isr.java
+++ b/peripheral/libmraa/examples/java/Isr.java
@@ -25,7 +25,6 @@
import mraa.Dir;
import mraa.Edge;
import mraa.Gpio;
-import mraa.IsrCallback;
public class Isr {
static {
@@ -41,7 +40,7 @@ public class Isr {
public static void main(String argv[]) throws InterruptedException {
Gpio gpio = new Gpio(6);
- IsrCallback callback = new JavaCallback();
+ Runnable callback = new JavaCallback();
gpio.isr(Edge.EDGE_RISING, callback);
while (true)
@@ -49,8 +48,6 @@ public class Isr {
};
}
-class JavaCallback extends IsrCallback {
- public JavaCallback() { super(); }
-
+class JavaCallback extends Runnable {
public void run() { System.out.println("JavaCallback.run()"); }
}
diff --git a/peripheral/libmraa/examples/javascript/Blink-IO.js b/peripheral/libmraa/examples/javascript/Blink-IO.js
index 64eb788..75f080c 100644
--- a/peripheral/libmraa/examples/javascript/Blink-IO.js
+++ b/peripheral/libmraa/examples/javascript/Blink-IO.js
@@ -29,11 +29,12 @@ var myLed = new m.Gpio(13); //LED hooked up to digital pin 13 (or built in pin o
myLed.dir(m.DIR_OUT); //set the gpio direction to output
var ledState = true; //Boolean to hold the state of Led
-periodicActivity(); //call the periodicActivity function
-
function periodicActivity()
{
myLed.write(ledState?1:0); //if ledState is true then write a '1' (high) otherwise write a '0' (low)
ledState = !ledState; //invert the ledState
setTimeout(periodicActivity,1000); //call the indicated function after 1 second (1000 milliseconds)
}
+
+periodicActivity(); //call the periodicActivity function
+
diff --git a/peripheral/libmraa/examples/mraa-i2c.c b/peripheral/libmraa/examples/mraa-i2c.c
index 6d9dfed..e02d0bc 100644
--- a/peripheral/libmraa/examples/mraa-i2c.c
+++ b/peripheral/libmraa/examples/mraa-i2c.c
@@ -84,7 +84,7 @@ print_bus(mraa_board_t* board)
busType = "unknown";
break;
}
- int id = board->i2c_bus[bus].bus_id;
+ int id = board->i2c_bus[i].bus_id;
fprintf(stdout, "Bus %3d: id=%02d type=%s ", bus, id, busType);
if (i == board->def_i2c_bus)
fprintf(stdout, " default");
diff --git a/peripheral/libmraa/examples/python/uart.py b/peripheral/libmraa/examples/python/uart_receiver.py
index b21ee5a..950be32 100644
--- a/peripheral/libmraa/examples/python/uart.py
+++ b/peripheral/libmraa/examples/python/uart_receiver.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python
-# Author: Brendan Le Foll <brendan.le.foll@intel.com>
-# Copyright (c) 2015 Intel Corporation.
+# Author: Alex Tereschenko <alext.mkrs@gmail.com>
+# Copyright (c) 2015 Alex Tereschenko
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
@@ -24,5 +24,21 @@
import mraa
-u = mraa.Uart(0)
-print u.getDevicePath()
+# Initialize UART
+u=mraa.Uart(0)
+
+# Set UART parameters
+u.setBaudRate(115200)
+u.setMode(8, mraa.UART_PARITY_NONE, 1)
+u.setFlowcontrol(False, False)
+
+# Start a neverending loop waiting for data to arrive.
+# Press Ctrl+C to get out of it.
+while True:
+ if u.dataAvailable():
+ # We are doing 1-byte reads here
+ data_byte = u.readStr(1)
+ print(data_byte)
+ # Just a two-way half-duplex communication example, "X" is a flag
+ if data_byte == "X":
+ u.writeStr("Yes, master!")
diff --git a/peripheral/libmraa/examples/python/uart_sender.py b/peripheral/libmraa/examples/python/uart_sender.py
new file mode 100644
index 0000000..4940a03
--- /dev/null
+++ b/peripheral/libmraa/examples/python/uart_sender.py
@@ -0,0 +1,57 @@
+#!/usr/bin/env python
+
+# Author: Alex Tereschenko <alext.mkrs@gmail.com>
+# Copyright (c) 2015 Alex Tereschenko
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+# LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+# OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+# WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE
+
+import mraa
+import sys
+
+sys.stdout.write("Initializing UART...")
+u=mraa.Uart(0)
+print("...done")
+
+print("Setting UART parameters: baudrate 115200, 8N1, no flow control")
+u.setBaudRate(115200)
+u.setMode(8, mraa.UART_PARITY_NONE, 1)
+u.setFlowcontrol(False, False)
+
+msg_b = bytearray("Hello, mraa byte array!", "ascii")
+print("Sending message as a byte array: '{0}'".format(msg_b))
+u.write(msg_b)
+# Make sure the message gets out to the line.
+# It's generally unnecessary (and performance-degrading) to do this explicitly,
+# UART driver normally takes care of that, but it may be useful with specific
+# half-duplex endpoints, like Dynamixel servos.
+u.flush()
+
+msg_s = "Hello, mraa string!"
+print("Sending message as a string: '{0}'".format(msg_s))
+u.writeStr(msg_s)
+
+sys.stdout.write("Two-way, half-duplex communication, sending a flag...")
+u.writeStr("X")
+print("...sent, awaiting response...")
+# Checking for data in the RX buffer, giving it a 100ms timeout
+if u.dataAvailable(100):
+ print("We've got a response: '{0}', says the other side".format(u.readStr(20)))
+else:
+ print("No data received, do you have anything at the other end?")
diff --git a/peripheral/libmraa/include/arm/96boards.h b/peripheral/libmraa/include/arm/96boards.h
new file mode 100644
index 0000000..863c6cd
--- /dev/null
+++ b/peripheral/libmraa/include/arm/96boards.h
@@ -0,0 +1,48 @@
+/*
+ * Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+ * Copyright (c) 2015 Linaro Limited.
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Copied from include/arm/banana.h
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_96BOARDS_LS_GPIO_COUNT 12
+#define MRAA_96BOARDS_LS_I2C_COUNT 2
+#define MRAA_96BOARDS_LS_SPI_COUNT 1
+#define MRAA_96BOARDS_LS_UART_COUNT 2
+
+#define DB410C_PINCOUNT 122
+#define HIKEY_PINCOUNT 512
+
+mraa_board_t* mraa_96boards();
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/peripheral/libmraa/include/mraa_adv_func.h b/peripheral/libmraa/include/mraa_adv_func.h
index 2bd0ffd..710aa21 100644
--- a/peripheral/libmraa/include/mraa_adv_func.h
+++ b/peripheral/libmraa/include/mraa_adv_func.h
@@ -32,7 +32,7 @@
#define IS_FUNC_DEFINED(dev, func) (dev != NULL && dev->advance_func != NULL && dev->advance_func->func != NULL)
typedef struct {
- mraa_result_t (*gpio_init_internal_replace) (int pin);
+ mraa_result_t (*gpio_init_internal_replace) (mraa_gpio_context dev, int pin);
mraa_result_t (*gpio_init_pre) (int pin);
mraa_result_t (*gpio_init_post) (mraa_gpio_context dev);
diff --git a/peripheral/libmraa/include/mraa_func.h b/peripheral/libmraa/include/mraa_func.h
deleted file mode 100644
index 094d848..0000000
--- a/peripheral/libmraa/include/mraa_func.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Author: Henry Bruce <henry.bruce@intel.com>
- * Copyright (c) 2015 Intel Corporation.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#include "common.h"
-#include "mraa.h"
-#include "types.h"
-
-typedef struct {
- mraa_i2c_context (*i2c_init_raw) (unsigned int bus);
- mraa_result_t (*i2c_frequency) (mraa_i2c_context dev, mraa_i2c_mode_t mode);
- mraa_result_t (*i2c_address) (mraa_i2c_context dev, uint8_t addr);
- int (*i2c_read) (mraa_i2c_context dev, uint8_t* data, int length);
- uint8_t (*i2c_read_byte) (mraa_i2c_context dev);
- uint8_t (*i2c_read_byte_data) (mraa_i2c_context dev, const uint8_t command);
- uint16_t (*i2c_read_word_data) (mraa_i2c_context dev, const uint8_t command);
- int (*i2c_read_bytes_data) (mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
- mraa_result_t (*i2c_write) (mraa_i2c_context dev, const uint8_t* data, int length);
- mraa_result_t (*i2c_write_byte) (mraa_i2c_context dev, const uint8_t data);
- mraa_result_t (*i2c_write_byte_data) (mraa_i2c_context dev, const uint8_t data, const uint8_t command);
- mraa_result_t (*i2c_write_word_data) (mraa_i2c_context dev, const uint16_t data, const uint8_t command);
- mraa_result_t (*i2c_stop) (mraa_i2c_context dev);
-} mraa_i2c_func_t;
-
-
-typedef struct {
- mraa_i2c_func_t* i2c;
-} mraa_func_t;
-
diff --git a/peripheral/libmraa/include/mraa_internal.h b/peripheral/libmraa/include/mraa_internal.h
index 93babe7..428876d 100644
--- a/peripheral/libmraa/include/mraa_internal.h
+++ b/peripheral/libmraa/include/mraa_internal.h
@@ -29,12 +29,14 @@ extern "C" {
#endif
#include <syslog.h>
+#include <fnmatch.h>
#include "common.h"
#include "mraa_internal_types.h"
#include "mraa_adv_func.h"
extern mraa_board_t* plat;
+extern mraa_iio_info_t* plat_iio;
/**
* Takes in pin information and sets up the multiplexors.
@@ -66,6 +68,13 @@ mraa_platform_t mraa_arm_platform();
mraa_platform_t mraa_usb_platform_extender(mraa_board_t* board);
/**
+ * runtime detect iio subsystem
+ *
+ * @return mraa_result_t indicating success of iio detection
+ */
+mraa_result_t mraa_iio_detect();
+
+/**
* helper function to check if file exists
*
* @param filename to check
diff --git a/peripheral/libmraa/include/mraa_internal_types.h b/peripheral/libmraa/include/mraa_internal_types.h
index 8350831..de91e7c 100644
--- a/peripheral/libmraa/include/mraa_internal_types.h
+++ b/peripheral/libmraa/include/mraa_internal_types.h
@@ -27,8 +27,8 @@
#include "common.h"
#include "mraa.h"
-#include "mraa_func.h"
#include "mraa_adv_func.h"
+#include "iio.h"
// Bionic does not implement pthread cancellation API
#ifndef __BIONIC__
@@ -130,6 +130,25 @@ struct _uart {
};
/**
+ * A structure representing an IIO device
+ */
+struct _iio {
+ int num; /**< IIO device number */
+ char* name; /**< IIO device name */
+ int fp; /**< IIO device in /dev */
+ int fp_event; /**< event file descriptor for IIO device */
+ void (* isr)(char* data); /**< the interupt service request */
+ void *isr_args; /**< args return when interupt service request triggered */
+ void (* isr_event)(struct iio_event_data* data, void* args); /**< the event interupt service request */
+ int chan_num;
+ pthread_t thread_id; /**< the isr handler thread id */
+ mraa_iio_channel* channels;
+ int event_num;
+ mraa_iio_event* events;
+ int datasize;
+};
+
+/**
* A bitfield representing the capabilities of a pin.
*/
typedef struct {
@@ -260,15 +279,20 @@ typedef struct _board_t {
unsigned int def_uart_dev; /**< Position in array of defult uart */
unsigned int uart_dev_count; /**< Usable spi Count */
mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
+ mraa_boolean_t no_bus_mux; /**< i2c/spi/adc/pwm/uart bus muxing setup not required */
int pwm_default_period; /**< The default PWM period is US */
int pwm_max_period; /**< Maximum period in us */
int pwm_min_period; /**< Minimum period in us */
mraa_platform_t platform_type; /**< Platform type */
const char* platform_name; /**< Platform Name pointer */
+ const char* platform_version; /**< Platform versioning info */
mraa_pininfo_t* pins; /**< Pointer to pin array */
mraa_adv_func_t* adv_func; /**< Pointer to advanced function disptach table */
struct _board_t* sub_platform; /**< Pointer to sub platform */
/*@}*/
} mraa_board_t;
-
+typedef struct {
+ struct _iio* iio_devices; /**< Pointer to IIO devices */
+ uint8_t iio_device_count; /**< IIO device count */
+} mraa_iio_info_t;
diff --git a/peripheral/libmraa/include/x86/intel_minnow_byt_compatible.h b/peripheral/libmraa/include/x86/intel_minnow_byt_compatible.h
index 0f22f14..5e4453c 100644
--- a/peripheral/libmraa/include/x86/intel_minnow_byt_compatible.h
+++ b/peripheral/libmraa/include/x86/intel_minnow_byt_compatible.h
@@ -34,7 +34,7 @@ extern "C" {
#define MRAA_INTEL_MINNOW_MAX_PINCOUNT (26 + 1)
mraa_board_t*
-mraa_intel_minnowboard_byt_compatible();
+mraa_intel_minnowboard_byt_compatible(mraa_boolean_t);
#ifdef __cplusplus
}
diff --git a/peripheral/libmraa/include/x86/intel_sofia_3gr.h b/peripheral/libmraa/include/x86/intel_sofia_3gr.h
new file mode 100644
index 0000000..163fdbb
--- /dev/null
+++ b/peripheral/libmraa/include/x86/intel_sofia_3gr.h
@@ -0,0 +1,39 @@
+/*
+ * Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_INTEL_SOFIA_3GR_PINCOUNT 8
+
+mraa_board_t* mraa_intel_sofia_3gr();
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/peripheral/libmraa/src/CMakeLists.txt b/peripheral/libmraa/src/CMakeLists.txt
index 177bce5..199c045 100644
--- a/peripheral/libmraa/src/CMakeLists.txt
+++ b/peripheral/libmraa/src/CMakeLists.txt
@@ -16,6 +16,7 @@ set (mraa_LIB_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/spi/spi.c
${PROJECT_SOURCE_DIR}/src/aio/aio.c
${PROJECT_SOURCE_DIR}/src/uart/uart.c
+ ${PROJECT_SOURCE_DIR}/src/iio/iio.c
)
set (mraa_LIB_X86_SRCS_NOAUTO
@@ -26,6 +27,7 @@ set (mraa_LIB_X86_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/x86/intel_de3815.c
${PROJECT_SOURCE_DIR}/src/x86/intel_nuc5.c
${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c
+ ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c
)
message (INFO " - Adding support for platform ${MRAAPLATFORMFORCE}")
@@ -45,6 +47,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c)
elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_NUC5")
set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_nuc5.c)
+ elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_SOFIA_3GR")
+ set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c)
else ()
message (ERROR " - Unknown x86 platform enabled!")
endif ()
@@ -54,6 +58,7 @@ endif ()
set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/arm.c
+ ${PROJECT_SOURCE_DIR}/src/arm/96boards.c
${PROJECT_SOURCE_DIR}/src/arm/raspberry_pi.c
${PROJECT_SOURCE_DIR}/src/arm/beaglebone.c
${PROJECT_SOURCE_DIR}/src/arm/banana.c
@@ -106,7 +111,7 @@ set (mraa_LIB_GLOB_HEADERS
${PROJECT_SOURCE_DIR}/api/mraa.hpp
)
-add_library (mraa SHARED ${mraa_LIB_SRCS})
+add_library (mraa ${mraa_LIB_SRCS})
target_link_libraries (mraa ${mraa_LIBS})
@@ -125,6 +130,7 @@ macro (mraa_CREATE_INSTALL_PKGCONFIG generated_file install_location)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} DESTINATION ${install_location})
endmacro (mraa_CREATE_INSTALL_PKGCONFIG)
mraa_create_install_pkgconfig (mraa.pc ${CMAKE_INSTALL_LIBDIR}/pkgconfig)
+mraa_create_install_pkgconfig (mraajava.pc ${CMAKE_INSTALL_LIBDIR}/pkgconfig)
install(TARGETS mraa DESTINATION ${CMAKE_INSTALL_LIBDIR})
@@ -166,6 +172,7 @@ if (DOXYGEN_FOUND)
endif ()
if (BUILDSWIG)
+ enable_language(CXX)
find_package (SWIG)
if (SWIG_FOUND)
include (${SWIG_USE_FILE})
diff --git a/peripheral/libmraa/src/aio/aio.c b/peripheral/libmraa/src/aio/aio.c
index 4e3bdc3..13119a7 100644
--- a/peripheral/libmraa/src/aio/aio.c
+++ b/peripheral/libmraa/src/aio/aio.c
@@ -58,7 +58,7 @@ aio_get_valid_fp(mraa_aio_context dev)
static mraa_aio_context
mraa_aio_init_internal(mraa_adv_func_t* func_table)
{
- mraa_aio_context dev = malloc(sizeof(struct _aio));
+ mraa_aio_context dev = calloc(1, sizeof(struct _aio));
if (dev == NULL) {
return NULL;
}
diff --git a/peripheral/libmraa/src/arm/96boards.c b/peripheral/libmraa/src/arm/96boards.c
new file mode 100644
index 0000000..152b970
--- /dev/null
+++ b/peripheral/libmraa/src/arm/96boards.c
@@ -0,0 +1,132 @@
+/*
+ * Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+ * Copyright (c) 2014 Intel Corporation.
+ * Copyright (c) 2015 Linaro Limited.
+ *
+ * Copied from src/arm/banana.c
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <mraa/common.h>
+
+#include "common.h"
+#include "arm/96boards.h"
+
+#define DT_BASE "/sys/firmware/devicetree/base"
+
+#define PLATFORM_NAME_DB410C "DB410C"
+#define PLATFORM_NAME_HIKEY "HIKEY"
+
+int db410c_ls_gpio_pins[MRAA_96BOARDS_LS_GPIO_COUNT] = {
+ 36, 12, 13, 69, 115, 4, 24, 25, 35, 34, 28, 33,
+};
+
+const char* db410c_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyMSM0", "/dev/ttyMSM1"};
+
+int hikey_ls_gpio_pins[MRAA_96BOARDS_LS_GPIO_COUNT] = {
+ 488, 489, 490, 491, 492, 415, 463, 495, 426, 433, 427, 434,
+};
+
+const char* hikey_serialdev[MRAA_96BOARDS_LS_UART_COUNT] = { "/dev/ttyAMA2", "/dev/ttyAMA3"};
+
+mraa_board_t* mraa_96boards()
+{
+ int i, pin;
+ int *ls_gpio_pins;
+ char ch;
+ char name[MRAA_PIN_NAME_SIZE];
+
+ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
+ if (b == NULL) {
+ return NULL;
+ }
+
+ // pin mux for buses are setup by default by kernel so tell mraa to ignore them
+ b->no_bus_mux = 1;
+
+ if (mraa_file_exist(DT_BASE "/model")) {
+ // We are on a modern kernel, great!!!!
+ if (mraa_file_contains(DT_BASE "/model", "Qualcomm Technologies, Inc. APQ 8016 SBC")) {
+ b->platform_name = PLATFORM_NAME_DB410C;
+ b->phy_pin_count = DB410C_PINCOUNT;
+ ls_gpio_pins = db410c_ls_gpio_pins;
+ b->uart_dev[0].device_path = db410c_serialdev[0];
+ b->uart_dev[1].device_path = db410c_serialdev[1];
+ } else if (mraa_file_contains(DT_BASE "/model", "HiKey Development Board")) {
+ b->platform_name = PLATFORM_NAME_HIKEY;
+ b->phy_pin_count = HIKEY_PINCOUNT;
+ ls_gpio_pins = hikey_ls_gpio_pins;
+ b->uart_dev[0].device_path = hikey_serialdev[0];
+ b->uart_dev[1].device_path = hikey_serialdev[1];
+ }
+ }
+
+ //UART
+ b->uart_dev_count = MRAA_96BOARDS_LS_UART_COUNT;
+ b->def_uart_dev = 0;
+
+ //I2C
+ b->i2c_bus_count = MRAA_96BOARDS_LS_I2C_COUNT;
+ b->def_i2c_bus = 0;
+ b->i2c_bus[0].bus_id = 0;
+ b->i2c_bus[1].bus_id= 1;
+
+ //SPI
+ b->spi_bus_count = MRAA_96BOARDS_LS_SPI_COUNT;
+ b->spi_bus[0].bus_id = 0;
+ b->def_spi_bus = 0;
+
+ b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
+ if (b->adv_func == NULL) {
+ free(b);
+ return NULL;
+ }
+
+ b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
+ if (b->pins == NULL) {
+ free(b->adv_func);
+ free(b);
+ return NULL;
+ }
+
+ // gpio lable starts from GPIO-A to GPIO-F
+ ch = 'A';
+ for (i = 0; i < MRAA_96BOARDS_LS_GPIO_COUNT; i++)
+ {
+ pin = ls_gpio_pins[i];
+ sprintf(name, "GPIO-%c", ch++);
+ strncpy(b->pins[pin].name, name, MRAA_PIN_NAME_SIZE);
+ b->pins[pin].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
+ b->pins[pin].gpio.pinmap = pin;
+ b->pins[pin].gpio.mux_total = 0;
+ }
+
+ b->gpio_count = MRAA_96BOARDS_LS_GPIO_COUNT;
+
+ b->aio_count = 0;
+ b->adc_raw = 0;
+ b->adc_supported = 0;
+
+ return b;
+}
diff --git a/peripheral/libmraa/src/arm/arm.c b/peripheral/libmraa/src/arm/arm.c
index e74e1cc..a3363c0 100644
--- a/peripheral/libmraa/src/arm/arm.c
+++ b/peripheral/libmraa/src/arm/arm.c
@@ -30,6 +30,8 @@
#include "arm/raspberry_pi.h"
#include "arm/beaglebone.h"
#include "arm/banana.h"
+#include "arm/96boards.h"
+
mraa_platform_t
mraa_arm_platform()
@@ -38,6 +40,7 @@ mraa_arm_platform()
size_t len = 100;
char* line = malloc(len);
FILE* fh = fopen("/proc/cpuinfo", "r");
+
if (fh != NULL) {
while (getline(&line, &len, fh) != -1) {
if (strncmp(line, "Hardware", 8) == 0) {
@@ -50,6 +53,9 @@ mraa_arm_platform()
if (strstr(line, "Generic AM33XX")) {
platform_type = MRAA_BEAGLEBONE;
}
+ if (strstr(line, "HiKey Development Board")) {
+ platform_type = MRAA_96BOARDS;
+ }
if (strstr(line, "sun7i")) {
if (mraa_file_contains("/sys/firmware/devicetree/base/model", "Banana Pro")) {
platform_type = MRAA_BANANA;
@@ -63,11 +69,18 @@ mraa_arm_platform()
}
}
}
+
}
fclose(fh);
}
free(line);
+ /* Get compatible string from Device tree for boards that dont have enough info in /proc/cpuinfo */
+ if (platform_type == MRAA_UNKNOWN_PLATFORM) {
+ if (mraa_file_contains("/sys/firmware/devicetree/base/compatible", "qcom,apq8016-sbc"))
+ platform_type = MRAA_96BOARDS;
+ }
+
switch (platform_type) {
case MRAA_RASPBERRY_PI:
plat = mraa_raspberry_pi();
@@ -78,6 +91,9 @@ mraa_arm_platform()
case MRAA_BANANA:
plat = mraa_banana();
break;
+ case MRAA_96BOARDS:
+ plat = mraa_96boards();
+ break;
default:
plat = NULL;
syslog(LOG_ERR, "Unknown Platform, currently not supported by MRAA");
diff --git a/peripheral/libmraa/src/arm/banana.c b/peripheral/libmraa/src/arm/banana.c
index 432d5ab..72918d5 100644
--- a/peripheral/libmraa/src/arm/banana.c
+++ b/peripheral/libmraa/src/arm/banana.c
@@ -199,7 +199,7 @@ mraa_banana_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
mraa_board_t*
mraa_banana()
{
- mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}
diff --git a/peripheral/libmraa/src/arm/beaglebone.c b/peripheral/libmraa/src/arm/beaglebone.c
index 6511e47..34652d8 100644
--- a/peripheral/libmraa/src/arm/beaglebone.c
+++ b/peripheral/libmraa/src/arm/beaglebone.c
@@ -356,7 +356,7 @@ mraa_beaglebone_pwm_init_replace(int pin)
}
if (mraa_file_exist(devpath)) {
- mraa_pwm_context dev = (mraa_pwm_context) malloc(sizeof(struct _pwm));
+ mraa_pwm_context dev = (mraa_pwm_context) calloc(1, sizeof(struct _pwm));
if (dev == NULL)
return NULL;
dev->duty_fp = -1;
@@ -488,7 +488,7 @@ mraa_beaglebone()
else
ehrpwm2b_enabled = 0;
- mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL)
return NULL;
// TODO: Detect Beaglebone Black Revisions, for now always TYPE B
@@ -512,7 +512,7 @@ mraa_beaglebone()
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
+ b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count,sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
diff --git a/peripheral/libmraa/src/arm/raspberry_pi.c b/peripheral/libmraa/src/arm/raspberry_pi.c
index bf09643..ad8b6ed 100644
--- a/peripheral/libmraa/src/arm/raspberry_pi.c
+++ b/peripheral/libmraa/src/arm/raspberry_pi.c
@@ -208,14 +208,14 @@ mraa_raspberry_pi_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
mraa_board_t*
mraa_raspberry_pi()
{
- mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
+ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}
b->phy_pin_count = 0;
size_t len = 100;
- char* line = malloc(len);
+ char* line = calloc(len, sizeof(char));
FILE* fh = fopen("/proc/cpuinfo", "r");
if (fh != NULL) {
@@ -280,7 +280,7 @@ mraa_raspberry_pi()
return NULL;
}
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
+ b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
free(b->adv_func);
free(b);
diff --git a/peripheral/libmraa/src/gpio/gpio.c b/peripheral/libmraa/src/gpio/gpio.c
index c354aac..b1a757c 100644
--- a/peripheral/libmraa/src/gpio/gpio.c
+++ b/peripheral/libmraa/src/gpio/gpio.c
@@ -72,7 +72,7 @@ mraa_gpio_init_internal(mraa_adv_func_t* func_table, int pin)
dev->pin = pin;
if (IS_FUNC_DEFINED(dev, gpio_init_internal_replace)) {
- status = dev->advance_func->gpio_init_internal_replace(pin);
+ status = dev->advance_func->gpio_init_internal_replace(dev, pin);
if (status == MRAA_SUCCESS)
return dev;
else
@@ -165,7 +165,8 @@ mraa_gpio_init(int pin)
syslog(LOG_CRIT, "gpio: mraa_gpio_init_raw(%d) returned error", pin);
return NULL;
}
- r->phy_pin = pin;
+ if (r->phy_pin == -1)
+ r->phy_pin = pin;
if (IS_FUNC_DEFINED(r, gpio_init_post)) {
mraa_result_t ret = r->advance_func->gpio_init_post(r);
@@ -233,6 +234,36 @@ mraa_gpio_wait_interrupt(int fd
return MRAA_SUCCESS;
}
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+pthread_key_t env_key;
+
+extern JavaVM *globVM;
+static pthread_once_t env_key_init = PTHREAD_ONCE_INIT;
+
+jmethodID runGlobal;
+
+static void make_env_key(void)
+{
+
+ JNIEnv *jenv;
+ (*globVM)->GetEnv(globVM, (void **)&jenv, JNI_VERSION_1_8);
+
+ jclass rcls = (*jenv)->FindClass(jenv, "java/lang/Runnable");
+ jmethodID runm = (*jenv)->GetMethodID(jenv, rcls, "run", "()V");
+
+ runGlobal = (jmethodID)(*jenv)->NewGlobalRef(jenv, (jobject)runm);
+
+ pthread_key_create(&env_key, NULL);
+}
+
+void mraa_java_isr_callback(void* data)
+{
+ JNIEnv *jenv = (JNIEnv *) pthread_getspecific(env_key);
+ (*jenv)->CallVoidMethod(jenv, (jobject)data, runGlobal);
+}
+
+#endif
+
static void*
mraa_gpio_interrupt_handler(void* arg)
{
@@ -261,6 +292,22 @@ mraa_gpio_interrupt_handler(void* arg)
dev->isr_value_fp = fp;
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+ JNIEnv *jenv;
+ if(dev->isr == mraa_java_isr_callback) {
+ jint err = (*globVM)->AttachCurrentThreadAsDaemon(globVM, (void **)&jenv, NULL);
+
+ if (err != JNI_OK) {
+ close(dev->isr_value_fp);
+ dev->isr_value_fp = -1;
+ return NULL;
+ }
+
+ pthread_once(&env_key_init, make_env_key);
+ pthread_setspecific(env_key, jenv);
+ }
+#endif
+
for (;;) {
ret = mraa_gpio_wait_interrupt(dev->isr_value_fp
#ifndef HAVE_PTHREAD_CANCEL
@@ -346,6 +393,13 @@ mraa_gpio_interrupt_handler(void* arg)
#endif
close(dev->isr_value_fp);
dev->isr_value_fp = -1;
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+
+ if(dev->isr == mraa_java_isr_callback) {
+ (*jenv)->DeleteGlobalRef(jenv, (jobject)dev->isr_args);
+ (*globVM)->DetachCurrentThread(globVM);
+ }
+#endif
return NULL;
}
}
@@ -413,6 +467,16 @@ mraa_gpio_isr(mraa_gpio_context dev, mraa_gpio_edge_t mode, void (*fptr)(void*),
}
dev->isr = fptr;
+#if defined(SWIGJAVA) || defined(JAVACALLBACK)
+ JNIEnv *jenv;
+ /* Most UPM sensors use the C API, the global ref must be created here. */
+ /* The reason for checking the callback function is internal callbacks. */
+ if (fptr == mraa_java_isr_callback) {
+ (*globVM)->GetEnv(globVM, (void **)&jenv, JNI_VERSION_1_8);
+ jobject grunnable = (*jenv)->NewGlobalRef(jenv, (jobject) args);
+ args = (void *) grunnable;
+ }
+#endif
dev->isr_args = args;
pthread_create(&dev->thread_id, NULL, mraa_gpio_interrupt_handler, (void*) dev);
diff --git a/peripheral/libmraa/src/i2c/i2c.c b/peripheral/libmraa/src/i2c/i2c.c
index c9dcda4..e196ab7 100644
--- a/peripheral/libmraa/src/i2c/i2c.c
+++ b/peripheral/libmraa/src/i2c/i2c.c
@@ -76,7 +76,7 @@ mraa_i2c_init_internal(mraa_adv_func_t* advance_func, unsigned int bus)
if (advance_func == NULL)
return NULL;
- mraa_i2c_context dev = (mraa_i2c_context) malloc(sizeof(struct _i2c));
+ mraa_i2c_context dev = (mraa_i2c_context) calloc(1, sizeof(struct _i2c));
if (dev == NULL) {
syslog(LOG_CRIT, "i2c: Failed to allocate memory for context");
return NULL;
@@ -161,20 +161,21 @@ mraa_i2c_init(int bus)
syslog(LOG_ERR, "Invalid i2c bus, moving to default i2c bus");
bus = board->def_i2c_bus;
}
-
- int pos = board->i2c_bus[bus].sda;
- if (board->pins[pos].i2c.mux_total > 0) {
- if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "i2c: Failed to set-up i2c sda multiplexer");
- return NULL;
+ if (!board->no_bus_mux) {
+ int pos = board->i2c_bus[bus].sda;
+ if (board->pins[pos].i2c.mux_total > 0) {
+ if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "i2c: Failed to set-up i2c sda multiplexer");
+ return NULL;
+ }
}
- }
- pos = board->i2c_bus[bus].scl;
- if (board->pins[pos].i2c.mux_total > 0) {
- if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "i2c: Failed to set-up i2c scl multiplexer");
- return NULL;
+ pos = board->i2c_bus[bus].scl;
+ if (board->pins[pos].i2c.mux_total > 0) {
+ if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "i2c: Failed to set-up i2c scl multiplexer");
+ return NULL;
+ }
}
}
diff --git a/peripheral/libmraa/src/iio/iio.c b/peripheral/libmraa/src/iio/iio.c
new file mode 100644
index 0000000..fd2c7f6
--- /dev/null
+++ b/peripheral/libmraa/src/iio/iio.c
@@ -0,0 +1,654 @@
+/*
+ * Author: Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "iio.h"
+#include "mraa_internal.h"
+#include "dirent.h"
+#include <string.h>
+#include <poll.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+
+#define MAX_SIZE 128
+#define IIO_DEVICE "iio:device"
+#define IIO_SCAN_ELEM "scan_elements"
+#define IIO_MOUNTING_MATRIX "mounting_matrix"
+#define IIO_SLASH_DEV "/dev/" IIO_DEVICE
+#define IIO_SYSFS_DEVICE "/sys/bus/iio/devices/" IIO_DEVICE
+#define IIO_EVENTS "events"
+#define IIO_CONFIGFS_TRIGGER "/sys/kernel/config/iio/triggers/"
+
+mraa_iio_context
+mraa_iio_init(int device)
+{
+ if (plat_iio->iio_device_count == 0 || device >= plat_iio->iio_device_count) {
+ return NULL;
+ }
+
+ mraa_iio_get_channel_data(&plat_iio->iio_devices[device]);
+ mraa_iio_get_event_data(&plat_iio->iio_devices[device]);
+
+ return &plat_iio->iio_devices[device];
+}
+
+int
+mraa_iio_read_size(mraa_iio_context dev)
+{
+ return dev->datasize;
+}
+
+mraa_iio_channel*
+mraa_iio_get_channels(mraa_iio_context dev)
+{
+ return dev->channels;
+}
+
+int
+mraa_iio_get_channel_count(mraa_iio_context dev)
+{
+ return dev->chan_num;
+}
+
+mraa_result_t
+mraa_iio_get_channel_data(mraa_iio_context dev)
+{
+ const struct dirent* ent;
+ DIR* dir;
+ int chan_num = 0;
+ char buf[MAX_SIZE];
+ char readbuf[32];
+ int fd;
+ int ret = 0;
+ int padint = 0;
+ int curr_bytes = 0;
+ char shortbuf, signchar;
+
+ dev->datasize = 0;
+
+ memset(buf, 0, MAX_SIZE);
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_SCAN_ELEM, dev->num);
+ dir = opendir(buf);
+ if (dir != NULL) {
+ while ((ent = readdir(dir)) != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), "_en") == 0) {
+ chan_num++;
+ }
+ }
+ }
+ dev->chan_num = chan_num;
+ // no need proceed if no channel found
+ if (chan_num == 0) {
+ closedir(dir);
+ return MRAA_SUCCESS;
+ }
+ mraa_iio_channel* chan;
+ dev->channels = calloc(chan_num, sizeof(mraa_iio_channel));
+ seekdir(dir, 0);
+ while ((ent = readdir(dir)) != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_index"), "_index") == 0) {
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_SCAN_ELEM "/%s", dev->num, ent->d_name);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ if (read(fd, readbuf, 2 * sizeof(char)) != 2) {
+ close(fd);
+ break;
+ }
+ chan_num = ((int) strtol(readbuf, NULL, 10));
+ chan = &dev->channels[chan_num];
+ chan->index = chan_num;
+ close(fd);
+
+ buf[(strlen(buf) - 5)] = '\0';
+ char* str = strdup(buf);
+ // grab the type of the buffer
+ snprintf(buf, MAX_SIZE, "%stype", str);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ read(fd, readbuf, 31 * sizeof(char));
+ ret = sscanf(readbuf, "%ce:%c%u/%u>>%u", &shortbuf, &signchar, &chan->bits_used,
+ &padint, &chan->shift);
+ chan->bytes = padint / 8;
+ if (curr_bytes % chan->bytes == 0) {
+ chan->location = curr_bytes;
+ } else {
+ chan->location = curr_bytes - curr_bytes % chan->bytes + chan->bytes;
+ }
+ curr_bytes = chan->location + chan->bytes;
+ // probably should be 5?
+ if (ret < 0) {
+ // cleanup
+ free(str);
+ close(fd);
+ return MRAA_IO_SETUP_FAILURE;
+ }
+ chan->signedd = (signchar == 's');
+ chan->lendian = (shortbuf == 'l');
+ if (chan->bits_used == 64) {
+ chan->mask = ~0;
+ } else {
+ chan->mask = (1 << chan->bits_used) - 1;
+ }
+ close(fd);
+ }
+ // grab the enable flag of channel
+ snprintf(buf, MAX_SIZE, "%sen", str);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ if (read(fd, readbuf, 2 * sizeof(char)) != 2) {
+ syslog(LOG_ERR, "iio: Failed to read a sensible value from sysfs");
+ free(str);
+ close(fd);
+ return -1;
+ }
+ chan->enabled = (int) strtol(readbuf, NULL, 10);
+ // only calculate enable buffer size for trigger buffer extract data
+ if (chan->enabled) {
+ dev->datasize += chan->bytes;
+ }
+ close(fd);
+ }
+ // clean up str var
+ free(str);
+ }
+ }
+ }
+ closedir(dir);
+
+ return MRAA_SUCCESS;
+}
+
+const char*
+mraa_iio_get_device_name(mraa_iio_context dev)
+{
+ return dev->name;
+}
+
+int
+mraa_iio_get_device_num_by_name(const char* name)
+{
+ int i;
+
+ if (plat_iio == NULL) {
+ syslog(LOG_ERR, "iio: platform IIO structure is not initialized");
+ return -1;
+ }
+
+ if (name == NULL) {
+ syslog(LOG_ERR, "iio: device name is NULL, unable to find its number");
+ return -1;
+ }
+
+ for (i = 0; i < plat_iio->iio_device_count; i++) {
+ struct _iio* device;
+ device = &plat_iio->iio_devices[i];
+ // we want to check for exact match
+ if (strncmp(device->name, name, strlen(device->name) + 1) == 0) {
+ return device->num;
+ }
+ }
+
+ return -1;
+}
+
+mraa_result_t
+mraa_iio_read_float(mraa_iio_context dev, const char* attr_name, float* data)
+{
+ char buf[MAX_SIZE];
+ mraa_result_t result = mraa_iio_read_string(dev, attr_name, buf, MAX_SIZE-1);
+ if (result != MRAA_SUCCESS)
+ return result;
+ int status = sscanf(buf, "%f", data);
+ result = status == 1 ? MRAA_SUCCESS : MRAA_ERROR_UNSPECIFIED;
+ return result;
+}
+
+
+mraa_result_t
+mraa_iio_read_int(mraa_iio_context dev, const char* attr_name, int* data)
+{
+ char buf[MAX_SIZE];
+ mraa_result_t result = mraa_iio_read_string(dev, attr_name, buf, MAX_SIZE-1);
+ if (result != MRAA_SUCCESS)
+ return result;
+ int status = sscanf(buf, "%d", data);
+ result = status == 1 ? MRAA_SUCCESS : MRAA_ERROR_UNSPECIFIED;
+ return result;
+}
+
+mraa_result_t
+mraa_iio_read_string(mraa_iio_context dev, const char* attr_name, char* data, int max_len)
+{
+ char buf[MAX_SIZE];
+ mraa_result_t result = MRAA_ERROR_UNSPECIFIED;
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/%s", dev->num, attr_name);
+ int fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ ssize_t len = read(fd, data, max_len);
+ if (len > 0)
+ result = MRAA_SUCCESS;
+ close(fd);
+ }
+ return result;
+
+}
+
+mraa_result_t
+mraa_iio_write_float(mraa_iio_context dev, const char* attr_name, const float data)
+{
+ char buf[MAX_SIZE];
+ snprintf(buf, MAX_SIZE, "%f", data);
+ return mraa_iio_write_string(dev, attr_name, buf);
+}
+
+mraa_result_t
+mraa_iio_write_int(mraa_iio_context dev, const char* attr_name, const int data)
+{
+ char buf[MAX_SIZE];
+ snprintf(buf, MAX_SIZE, "%d", data);
+ return mraa_iio_write_string(dev, attr_name, buf);
+}
+
+mraa_result_t
+mraa_iio_write_string(mraa_iio_context dev, const char* attr_name, const char* data)
+{
+ char buf[MAX_SIZE];
+ mraa_result_t result = MRAA_ERROR_UNSPECIFIED;
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/%s", dev->num, attr_name);
+ int fd = open(buf, O_WRONLY);
+ if (fd != -1) {
+ size_t len = strlen(data);
+ ssize_t status = write(fd, data, len);
+ if (status == len)
+ result = MRAA_SUCCESS;
+ close(fd);
+ }
+ return result;
+}
+
+static mraa_result_t
+mraa_iio_wait_event(int fd, char* data, int* read_size)
+{
+ struct pollfd pfd;
+
+ if (fd < 0) {
+ return MRAA_ERROR_INVALID_RESOURCE;
+ }
+
+ pfd.fd = fd;
+ pfd.events = POLLIN;
+
+ // Wait for it forever or until pthread_cancel
+ // poll is a cancelable point like sleep()
+ int x = poll(&pfd, 1, -1);
+
+ memset(data, 0, 100);
+ *read_size = read(fd, data, 100);
+
+ return MRAA_SUCCESS;
+}
+
+static void*
+mraa_iio_trigger_handler(void* arg)
+{
+ mraa_iio_context dev = (mraa_iio_context) arg;
+ int i;
+ char data[MAX_SIZE * 100];
+ int read_size;
+
+ for (;;) {
+ if (mraa_iio_wait_event(dev->fp, &data[0], &read_size) == MRAA_SUCCESS) {
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, NULL);
+#endif
+ // only can process if readsize >= enabled channel's datasize
+ for (i = 0; i < (read_size / dev->datasize); i++) {
+ dev->isr((void*)&data);
+ }
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_ENABLE, NULL);
+#endif
+ } else {
+ // we must have got an error code so die nicely
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, NULL);
+#endif
+ return NULL;
+ }
+ }
+}
+
+mraa_result_t
+mraa_iio_trigger_buffer(mraa_iio_context dev, void (*fptr)(char* data), void* args)
+{
+ char bu[MAX_SIZE];
+ if (dev->thread_id != 0) {
+ return MRAA_ERROR_NO_RESOURCES;
+ }
+
+ sprintf(bu, IIO_SLASH_DEV "%d", dev->num);
+ dev->fp = open(bu, O_RDONLY | O_NONBLOCK);
+ if (dev->fp == -1) {
+ return MRAA_ERROR_INVALID_RESOURCE;
+ }
+
+ dev->isr = fptr;
+ pthread_create(&dev->thread_id, NULL, mraa_iio_trigger_handler, (void*) dev);
+
+ return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_iio_get_event_data(mraa_iio_context dev)
+{
+ const struct dirent* ent;
+ DIR* dir;
+ int event_num = 0;
+ char buf[MAX_SIZE];
+ char readbuf[32];
+ int fd;
+ int ret = 0;
+ int padint = 0;
+ int curr_bytes = 0;
+ char shortbuf, signchar;
+ memset(buf, 0, MAX_SIZE);
+ memset(readbuf, 0, 32);
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_EVENTS, dev->num);
+ dir = opendir(buf);
+ if (dir != NULL) {
+ while ((ent = readdir(dir)) != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), "_en") == 0) {
+ event_num++;
+ }
+ }
+ dev->event_num = event_num;
+ // no need proceed if no event found
+ if (event_num == 0) {
+ closedir(dir);
+ return MRAA_SUCCESS;
+ }
+ mraa_iio_event* event;
+ dev->events = calloc(event_num, sizeof(mraa_iio_event));
+ if (dev->events == NULL) {
+ closedir(dir);
+ return MRAA_ERROR_UNSPECIFIED;
+ }
+ rewinddir(dir);
+ event_num = 0;
+ while ((ent = readdir(dir)) != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"), "_en") == 0) {
+ event = &dev->events[event_num];
+ event->name = strdup(ent->d_name);
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_EVENTS "/%s", dev->num, ent->d_name);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ if (read(fd, readbuf, 2 * sizeof(char)) != 2) {
+ close(fd);
+ break;
+ }
+ close(fd);
+ }
+ event->enabled = ((int) strtol(readbuf, NULL, 10));
+ // Todo, read other event info.
+ event_num++;
+ }
+ }
+ closedir(dir);
+ }
+ return MRAA_SUCCESS;
+}
+
+static mraa_result_t
+mraa_iio_event_poll_nonblock(int fd, struct iio_event_data* data)
+{
+ struct pollfd pfd;
+
+ if (fd < 0) {
+ return MRAA_ERROR_INVALID_RESOURCE;
+ }
+
+ pfd.fd = fd;
+ pfd.events = POLLIN;
+
+ // Wait for it forever or until pthread_cancel
+ // poll is a cancelable point like sleep()
+ int x = poll(&pfd, 1, -1);
+
+ read(fd, data, sizeof(struct iio_event_data));
+
+ return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_iio_event_poll(mraa_iio_context dev, struct iio_event_data* data)
+{
+ char bu[MAX_SIZE];
+ int ret;
+ int event_fd;
+ int fd;
+
+ snprintf(bu, MAX_SIZE, IIO_SLASH_DEV "%d", dev->num);
+ fd = open(bu, 0);
+ if (fd != -1) {
+ ret = ioctl(fd, IIO_GET_EVENT_FD_IOCTL, &event_fd);
+ close(fd);
+ } else {
+ return MRAA_ERROR_UNSPECIFIED;
+ }
+
+ if (ret == -1 || event_fd == -1)
+ return MRAA_ERROR_UNSPECIFIED;
+
+ ret = read(event_fd, data, sizeof(struct iio_event_data));
+
+ close(event_fd);
+ return MRAA_SUCCESS;
+}
+
+static void*
+mraa_iio_event_handler(void* arg)
+{
+ struct iio_event_data data;
+ mraa_iio_context dev = (mraa_iio_context) arg;
+
+ for (;;) {
+ if (mraa_iio_event_poll_nonblock(dev->fp_event, &data) == MRAA_SUCCESS) {
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, NULL);
+#endif
+ dev->isr_event(&data, dev->isr_args);
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_ENABLE, NULL);
+#endif
+ } else {
+ // we must have got an error code so die nicely
+#ifdef HAVE_PTHREAD_CANCEL
+ pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, NULL);
+#endif
+ return NULL;
+ }
+ }
+}
+
+mraa_result_t
+mraa_iio_event_setup_callback(mraa_iio_context dev, void (*fptr)(struct iio_event_data* data, void* args), void* args)
+{
+ int ret;
+ char bu[MAX_SIZE];
+ if (dev->thread_id != 0) {
+ return MRAA_ERROR_NO_RESOURCES;
+ }
+
+ sprintf(bu, IIO_SLASH_DEV "%d", dev->num);
+ dev->fp = open(bu, O_RDONLY | O_NONBLOCK);
+ if (dev->fp == -1) {
+ return MRAA_ERROR_INVALID_RESOURCE;
+ }
+ ret = ioctl(dev->fp, IIO_GET_EVENT_FD_IOCTL, &dev->fp_event);
+ close(dev->fp);
+
+ if (ret == -1 || dev->fp_event == -1) {
+ return MRAA_ERROR_UNSPECIFIED;
+ }
+
+ dev->isr_event = fptr;
+ dev->isr_args = args;
+ pthread_create(&dev->thread_id, NULL, mraa_iio_event_handler, (void*) dev);
+
+ return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_iio_event_extract_event(struct iio_event_data* event,
+ int* chan_type,
+ int* modifier,
+ int* type,
+ int* direction,
+ int* channel,
+ int* channel2,
+ int* different)
+{
+ *chan_type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id);
+ *modifier = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id);
+ *type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id);
+ *direction = IIO_EVENT_CODE_EXTRACT_DIR(event->id);
+ *channel = IIO_EVENT_CODE_EXTRACT_CHAN(event->id);
+ *channel2 = IIO_EVENT_CODE_EXTRACT_CHAN2(event->id);
+ *different = IIO_EVENT_CODE_EXTRACT_DIFF(event->id);
+ return MRAA_SUCCESS;
+}
+
+mraa_result_t
+mraa_iio_get_mounting_matrix(mraa_iio_context dev, float mm[9])
+{
+ char buf[MAX_SIZE];
+ FILE* fp;
+ int ret;
+
+ memset(buf, 0, MAX_SIZE);
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_MOUNTING_MATRIX, dev->num);
+ fp = fopen(buf, "r");
+ if (fp != NULL) {
+ ret = fscanf(fp, "%f %f %f\n%f %f %f\n%f %f %f\n", &mm[0], &mm[1], &mm[2], &mm[3], &mm[4], &mm[5],
+ &mm[6], &mm[7], &mm[8]);
+ fclose(fp);
+ if (ret != 9) {
+ return MRAA_ERROR_UNSPECIFIED;
+ }
+ return MRAA_SUCCESS;
+ }
+ return MRAA_ERROR_UNSPECIFIED;
+}
+
+mraa_result_t
+mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger)
+{
+ struct stat configfs_status;
+ struct stat trigger_status;
+ char buf[MAX_SIZE];
+ int ret;
+
+ if (stat(IIO_CONFIGFS_TRIGGER, &configfs_status) == 0) {
+ memset(buf, 0, MAX_SIZE);
+ snprintf(buf, MAX_SIZE, IIO_CONFIGFS_TRIGGER "%s", trigger);
+ // we actually don't care if this doesn't succeed, as it just means
+ // it's already been initialised
+ mkdir(buf, configfs_status.st_mode);
+ }
+
+ return MRAA_ERROR_UNSPECIFIED;
+}
+
+mraa_result_t
+mraa_iio_update_channels(mraa_iio_context dev)
+{
+ const struct dirent* ent;
+ DIR* dir;
+ int chan_num = 0;
+ char buf[MAX_SIZE];
+ char readbuf[32];
+ int fd;
+ mraa_iio_channel* chan;
+
+ dev->datasize = 0;
+ memset(buf, 0, MAX_SIZE);
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_SCAN_ELEM, dev->num);
+ dir = opendir(buf);
+ if (dir != NULL) {
+ while ((ent = readdir(dir)) != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_index"), "_index") == 0) {
+ snprintf(buf, MAX_SIZE, IIO_SYSFS_DEVICE "%d/" IIO_SCAN_ELEM "/%s", dev->num, ent->d_name);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ if (read(fd, readbuf, 2 * sizeof(char)) != 2) {
+ close(fd);
+ break;
+ }
+ chan_num = ((int) strtol(readbuf, NULL, 10));
+ if (chan_num >= 0 && chan_num < dev->chan_num) {
+ chan = &dev->channels[chan_num];
+ chan->index = chan_num;
+ close(fd);
+
+ buf[(strlen(buf) - 5)] = '\0';
+ char* str = strdup(buf);
+ // grab the enable flag of channel
+ snprintf(buf, MAX_SIZE, "%sen", str);
+ fd = open(buf, O_RDONLY);
+ if (fd != -1) {
+ if (read(fd, readbuf, 2 * sizeof(char)) != 2) {
+ syslog(LOG_ERR, "iio: Failed to read a sensible value from sysfs");
+ free(str);
+ close(fd);
+ closedir(dir);
+ return -1;
+ }
+ chan->enabled = (int) strtol(readbuf, NULL, 10);
+ // only calculate enable buffer size for trigger buffer extract data
+ if (chan->enabled) {
+ dev->datasize += chan->bytes;
+ }
+ close(fd);
+ }
+ // clean up str var
+ free(str);
+ }
+ else {
+ close(fd);
+ }
+ }
+ }
+ }
+ closedir(dir);
+ return MRAA_SUCCESS;
+ }
+
+ return MRAA_ERROR_INVALID_HANDLE;
+}
+
+mraa_result_t
+mraa_iio_close(mraa_iio_context dev)
+{
+ free(dev->channels);
+ return MRAA_SUCCESS;
+}
diff --git a/peripheral/libmraa/src/java/CMakeLists.txt b/peripheral/libmraa/src/java/CMakeLists.txt
index 5225d3b..c8b0056 100644
--- a/peripheral/libmraa/src/java/CMakeLists.txt
+++ b/peripheral/libmraa/src/java/CMakeLists.txt
@@ -10,7 +10,8 @@ include_directories (
set_source_files_properties (mraajava.i PROPERTIES SWIG_FLAGS ";-package;mraa;-I${CMAKE_BINARY_DIR}/src")
set_source_files_properties (mraajava.i PROPERTIES CPLUSPLUS ON)
-set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fpermissive")
+set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fpermissive -DJAVACALLBACK")
+set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DJAVACALLBACK")
if (NOT DEFINED $ENV{JAVA_HOME_NATIVE})
set (JAVA_HOME_NATIVE $ENV{JAVA_HOME})
@@ -29,6 +30,7 @@ add_custom_command (TARGET mraajava
COMMAND cmake -E echo "Compiling java.."
COMMAND cmake -E make_directory ${CMAKE_CURRENT_BINARY_DIR}/mraa
COMMAND ${JAVAC} *.java -d ${CMAKE_CURRENT_BINARY_DIR}
+ COMMAND cmake -E create_symlink java/libmraajava.so ${CMAKE_CURRENT_BINARY_DIR}/../libmraajava.so
COMMAND cmake -E echo "Creating jar"
COMMAND ${JAR} cvf mraa.jar mraa
)
@@ -42,6 +44,9 @@ endif ()
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/libmraajava.so
DESTINATION lib/java
)
+install (FILES ${CMAKE_CURRENT_BINARY_DIR}/../libmraajava.so
+ DESTINATION lib/
+)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/mraa.jar
DESTINATION lib/java
)
diff --git a/peripheral/libmraa/src/java/mraajava.i b/peripheral/libmraa/src/java/mraajava.i
index a97e90c..d8b698b 100644
--- a/peripheral/libmraa/src/java/mraajava.i
+++ b/peripheral/libmraa/src/java/mraajava.i
@@ -42,6 +42,9 @@
return $jnicall;
}
+%typemap(jtype) jobject runnable "java.lang.Runnable"
+%typemap(jstype) jobject runnable "java.lang.Runnable"
+
namespace mraa {
class Spi;
%typemap(out) uint8_t*
@@ -55,13 +58,18 @@ class Spi;
%ignore write(const char* data, int length);
%ignore read(char* data, int length);
+%ignore globVM;
+%ignore env_key;
+%ignore mraa_java_isr_callback;
-%feature("director") IsrCallback;
%include ../mraa.i
%wrapper %{
+ JavaVM *globVM;
+
jint JNI_OnLoad(JavaVM *vm, void *reserved) {
/* initialize mraa */
+ globVM = vm;
mraa_init();
return JNI_VERSION_1_8;
}
diff --git a/peripheral/libmraa/src/javascript/binding.gyp.cmake b/peripheral/libmraa/src/javascript/binding.gyp.cmake
index 8fecc19..4675e26 100644
--- a/peripheral/libmraa/src/javascript/binding.gyp.cmake
+++ b/peripheral/libmraa/src/javascript/binding.gyp.cmake
@@ -10,7 +10,7 @@
@mraa_LIB_INCLUDE_DIRS_GYP@
],
'variables': {
- "v8_version%": "<!(node -e 'console.log(process.versions.v8)' | sed 's/\.//g')",
+ "v8_version%": "<!(node -e 'console.log(process.versions.v8)' | sed 's/\.//g' | cut -c 1-5)",
"arch%": "<!(node -e 'console.log(process.arch)')"
},
'cflags_cc!': [ '-fno-rtti', '-fno-exceptions' ],
diff --git a/peripheral/libmraa/src/javascript/mraajs.i b/peripheral/libmraa/src/javascript/mraajs.i
index 5507b01..7ff07fa 100644
--- a/peripheral/libmraa/src/javascript/mraajs.i
+++ b/peripheral/libmraa/src/javascript/mraajs.i
@@ -43,11 +43,10 @@ class Spi;
%typemap(out) uint8_t*
{
%#if SWIG_V8_VERSION > 0x040000
- v8::MaybeLocal<v8::Object> objret = node::Buffer::New(v8::Isolate::GetCurrent(), (char*) result, arg3);
+ v8::MaybeLocal<v8::Object> objret = node::Buffer::Copy(v8::Isolate::GetCurrent(), (char*) result, arg3);
free(result);
- if(!objret.ToLocal(&$result)) {
- SWIG_exception_fail(SWIG_ERROR, "Spi buffer failed");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
+ if(!objret.ToLocal(&$result)){
+ SWIG_exception_fail(SWIG_ERROR, "Spi buffer failed");
}
%#elif SWIG_V8_VERSION > 0x032870
$result = node::Buffer::New((char*) result, arg3);
@@ -73,7 +72,6 @@ class Spi;
$2 = x;
if ($2 < 0) {
SWIG_exception_fail(SWIG_ERROR, "Positive integer expected");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
$1 = (char*) malloc($2 * sizeof(uint8_t));
}
@@ -82,14 +80,12 @@ class Spi;
if (result < 0) { /* Check for I/O error */
free($1);
SWIG_exception_fail(SWIG_ERROR, "Uart write failed");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
%#if SWIG_V8_VERSION > 0x040000
- v8::MaybeLocal<v8::Object> objret = node::Buffer::New(v8::Isolate::GetCurrent(), (char*) $1, result);
+ v8::MaybeLocal<v8::Object> objret = node::Buffer::Copy(v8::Isolate::GetCurrent(), (char*) $1, result);
free($1);
if(!objret.ToLocal(&$result)) {
SWIG_exception_fail(SWIG_ERROR, "Uart buffer failed");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
%#elif SWIG_V8_VERSION > 0x032870
$result = node::Buffer::New((char*) $1, result);
@@ -111,7 +107,6 @@ class Spi;
$2 = x;
if ($2 < 0) {
SWIG_exception_fail(SWIG_ERROR, "Positive integer expected");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
$1 = (uint8_t*) malloc($2 * sizeof(uint8_t));
}
@@ -120,14 +115,12 @@ class Spi;
if (result < 0) { /* Check for I/O error */
free($1);
SWIG_exception_fail(SWIG_ERROR, "I2c write failed");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
%#if SWIG_V8_VERSION > 0x040000
- v8::MaybeLocal<v8::Object> objret = node::Buffer::New(v8::Isolate::GetCurrent(), (char*) $1, result);
+ v8::MaybeLocal<v8::Object> objret = node::Buffer::Copy(v8::Isolate::GetCurrent(), (char*) $1, result);
free($1);
if(!objret.ToLocal(&$result)) {
SWIG_exception_fail(SWIG_ERROR, "I2c buffer failed");
- SWIGV8_RETURN(SWIGV8_UNDEFINED());
}
%#elif SWIG_V8_VERSION > 0x032870
$result = node::Buffer::New((char*) $1, result);
diff --git a/peripheral/libmraa/src/mraa.c b/peripheral/libmraa/src/mraa.c
index 9daa0f6..082c12d 100644
--- a/peripheral/libmraa/src/mraa.c
+++ b/peripheral/libmraa/src/mraa.c
@@ -1,7 +1,7 @@
/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Copyright (c) 2014-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
@@ -45,12 +45,15 @@
#include "gpio.h"
#include "version.h"
-#define MAX_PLATFORM_NAME_LENGTH 128
+#define IIO_DEVICE_WILDCARD "iio:device*"
mraa_board_t* plat = NULL;
-// static mraa_board_t* current_plat = NULL;
+mraa_iio_info_t* plat_iio = NULL;
-static char platform_name[MAX_PLATFORM_NAME_LENGTH];
-mraa_adv_func_t* advance_func;
+static char* platform_name = NULL;
+static char* platform_long_name = NULL;
+
+static int num_i2c_devices = 0;
+static int num_iio_devices = 0;
const char*
mraa_get_version()
@@ -70,6 +73,7 @@ mraa_set_log_level(int level)
return MRAA_ERROR_INVALID_PARAMETER;
}
+
#if (defined SWIGPYTHON) || (defined SWIG)
mraa_result_t
#else
@@ -101,9 +105,6 @@ mraa_init()
PyEval_InitThreads();
#endif
- advance_func = (mraa_adv_func_t*) malloc(sizeof(mraa_adv_func_t));
- memset(advance_func, 0, sizeof(mraa_adv_func_t));
-
mraa_platform_t platform_type;
#if defined(X86PLAT)
// Use runtime x86 platform detection
@@ -115,8 +116,11 @@ mraa_init()
#error mraa_ARCH NOTHING
#endif
- if (plat != NULL)
+ if (plat != NULL) {
plat->platform_type = platform_type;
+ } else {
+ platform_name = NULL;
+ }
#if defined(USBPLAT)
// This is a platform extender so create null base platform if one doesn't already exist
@@ -124,7 +128,7 @@ mraa_init()
plat = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (plat != NULL) {
plat->platform_type = MRAA_NULL_PLATFORM;
- plat->platform_name = "Null platform";
+ plat->platform_name = "Unknown platform";
}
}
// Now detect sub platform
@@ -142,6 +146,22 @@ mraa_init()
}
#endif
+ // Look for IIO devices
+ mraa_iio_detect();
+
+ if (plat != NULL) {
+ int length = strlen(plat->platform_name) + 1;
+ if (mraa_has_sub_platform()) {
+ length += strlen(plat->sub_platform->platform_name);
+ }
+ platform_name = calloc(length, sizeof(char));
+ if (mraa_has_sub_platform()) {
+ snprintf(platform_name, length, "%s + %s", plat->platform_name, plat->sub_platform->platform_name);
+ } else {
+ strncpy(platform_name, plat->platform_name, length);
+ }
+ }
+
syslog(LOG_NOTICE, "libmraa initialised for platform '%s' of type %d", mraa_get_platform_name(), mraa_get_platform_type());
return MRAA_SUCCESS;
}
@@ -163,6 +183,9 @@ mraa_deinit()
free(plat);
}
+ if (plat_iio != NULL) {
+ free(plat_iio);
+ }
closelog();
}
@@ -181,6 +204,55 @@ mraa_set_priority(const unsigned int priority)
return sched_setscheduler(0, SCHED_RR, &sched_s);
}
+static int
+mraa_count_iio_devices(const char* path, const struct stat* sb, int flag, struct FTW* ftwb)
+{
+ // we are only interested in files with specific names
+ if (fnmatch(IIO_DEVICE_WILDCARD, basename(path), 0) == 0) {
+ num_iio_devices++;
+ }
+ return 0;
+}
+
+mraa_result_t
+mraa_iio_detect()
+{
+ plat_iio = (mraa_iio_info_t*) calloc(1, sizeof(mraa_iio_info_t));
+ plat_iio->iio_device_count = num_iio_devices;
+ // Now detect IIO devices, linux only
+ // find how many iio devices we have if we haven't already
+ if (num_iio_devices == 0) {
+ if (nftw("/sys/bus/iio/devices", &mraa_count_iio_devices, 20, FTW_PHYS) == -1) {
+ return MRAA_ERROR_UNSPECIFIED;
+ }
+ }
+ char name[64], filepath[64];
+ int fd, len, i;
+ plat_iio->iio_device_count = num_iio_devices;
+ plat_iio->iio_devices = calloc(num_iio_devices, sizeof(struct _iio));
+ struct _iio* device;
+ for (i=0; i < num_iio_devices; i++) {
+ device = &plat_iio->iio_devices[i];
+ device->num = i;
+ snprintf(filepath, 64, "/sys/bus/iio/devices/iio:device%d/name", i);
+ fd = open(filepath, O_RDONLY);
+ if (fd != -1) {
+ len = read(fd, &name, 64);
+ if (len > 1) {
+ // remove any trailing CR/LF symbols
+ name[strcspn(name, "\r\n")] = '\0';
+ len = strlen(name);
+ // use strndup
+ device->name = malloc((sizeof(char) * len) + sizeof(char));
+ strncpy(device->name, name, len+1);
+ }
+ close(fd);
+ }
+ }
+ return MRAA_SUCCESS;
+}
+
+
mraa_result_t
mraa_setup_mux_mapped(mraa_pin_t meta)
{
@@ -401,20 +473,23 @@ mraa_get_platform_adc_supported_bits(int platform_offset)
}
}
-
-char*
+const char*
mraa_get_platform_name()
{
+ return platform_name;
+}
+
+const char*
+mraa_get_platform_version(int platform_offset)
+{
if (plat == NULL) {
return NULL;
}
- if (mraa_has_sub_platform()) {
- snprintf(platform_name, MAX_PLATFORM_NAME_LENGTH, "%s + %s", plat->platform_name, plat->sub_platform->platform_name);
+ if (platform_offset == MRAA_MAIN_PLATFORM_OFFSET) {
+ return plat->platform_version;
} else {
- strncpy(platform_name, plat->platform_name, MAX_PLATFORM_NAME_LENGTH-1);
+ return plat->sub_platform->platform_version;
}
-
- return platform_name;
}
int
@@ -522,7 +597,7 @@ mraa_file_contains(const char* filename, const char* content)
char* file = mraa_file_unglob(filename);
if (file != NULL) {
size_t len = 1024;
- char* line = malloc(len);
+ char* line = calloc(len, sizeof(char));
if (line == NULL) {
free(file);
return 0;
@@ -557,7 +632,7 @@ mraa_file_contains_both(const char* filename, const char* content, const char* c
char* file = mraa_file_unglob(filename);
if (file != NULL) {
size_t len = 1024;
- char* line = malloc(len);
+ char* line = calloc(len, sizeof(char));
if (line == NULL) {
free(file);
return 0;
@@ -625,10 +700,8 @@ mraa_link_targets(const char* filename, const char* targetname)
}
}
-static int num_i2c_devices = 0;
-
static int
-mraa_count_files(const char* path, const struct stat* sb, int flag, struct FTW* ftwb)
+mraa_count_i2c_files(const char* path, const struct stat* sb, int flag, struct FTW* ftwb)
{
switch (sb->st_mode & S_IFMT) {
case S_IFLNK:
@@ -654,7 +727,7 @@ mraa_find_i2c_bus(const char* devname, int startfrom)
// find how many i2c buses we have if we haven't already
if (num_i2c_devices == 0) {
- if (nftw("/sys/class/i2c-dev/", &mraa_count_files, 20, FTW_PHYS) == -1) {
+ if (nftw("/sys/class/i2c-dev/", &mraa_count_i2c_files, 20, FTW_PHYS) == -1) {
return -1;
}
}
@@ -724,3 +797,23 @@ mraa_get_sub_platform_index(int pin_or_bus)
{
return pin_or_bus & (~MRAA_SUB_PLATFORM_MASK);
}
+
+int
+mraa_get_iio_device_count()
+{
+ return plat_iio->iio_device_count;
+}
+
+int
+mraa_find_iio_device(const char* devicename)
+{
+ int i = 0;
+ for (i; i < plat_iio->iio_device_count; i++) {
+#if 0
+ // compare with devices array
+ if (!strcmp() {
+ }
+#endif
+ }
+ return 0;
+}
diff --git a/peripheral/libmraa/src/mraa.i b/peripheral/libmraa/src/mraa.i
index 2aea6ba..7a2d03e 100644
--- a/peripheral/libmraa/src/mraa.i
+++ b/peripheral/libmraa/src/mraa.i
@@ -46,6 +46,7 @@
%ignore Gpio::v8isr(uv_work_t* req);
%ignore Gpio::v8isr(uv_work_t* req, int status);
%ignore Gpio::uvwork(void *ctx);
+%ignore Gpio::isr(Edge mode, void (*fptr)(void*), void* args);
%include "gpio.hpp"
diff --git a/peripheral/libmraa/src/mraajava.pc.cmake b/peripheral/libmraa/src/mraajava.pc.cmake
new file mode 100644
index 0000000..e234153
--- /dev/null
+++ b/peripheral/libmraa/src/mraajava.pc.cmake
@@ -0,0 +1,11 @@
+prefix=@CMAKE_INSTALL_PREFIX@
+exec_prefix=${prefix}
+libdir=${exec_prefix}/lib@LIB_SUFFIX@
+includedir=${prefix}/include
+
+Name: mraa
+Description: Low Level Skeleton Library for Communication
+Version: @mraa_VERSION_STRING@
+
+Libs: -L${libdir} -lmraajava
+Cflags: -I${includedir}
diff --git a/peripheral/libmraa/src/pwm/pwm.c b/peripheral/libmraa/src/pwm/pwm.c
index 420e32c..ae7685e 100644
--- a/peripheral/libmraa/src/pwm/pwm.c
+++ b/peripheral/libmraa/src/pwm/pwm.c
@@ -162,7 +162,7 @@ mraa_pwm_read_duty(mraa_pwm_context dev)
static mraa_pwm_context
mraa_pwm_init_internal(mraa_adv_func_t* func_table, int chipin, int pin)
{
- mraa_pwm_context dev = (mraa_pwm_context) malloc(sizeof(struct _pwm));
+ mraa_pwm_context dev = (mraa_pwm_context) calloc(1,sizeof(struct _pwm));
if (dev == NULL) {
return NULL;
}
diff --git a/peripheral/libmraa/src/python/docs/example.rst b/peripheral/libmraa/src/python/docs/example.rst
index b974a28..4daf98c 100644
--- a/peripheral/libmraa/src/python/docs/example.rst
+++ b/peripheral/libmraa/src/python/docs/example.rst
@@ -71,3 +71,23 @@ fairly simple in use.
:prepend: import mraa
:start-after: import mraa
+Uart
+====
+
+Uart is the Universal asynchronous receiver/transmitter interface in mraa.
+It allows the exposure of UART pins on supported boards, with basic
+configuration operations supported.
+
+Here's a simple pair of programs comprising a sender and receiver pair.
+
+Sender:
+
+.. literalinclude:: ../../../examples/python/uart_sender.py
+ :prepend: import mraa
+ :start-after: import mraa
+
+Receiver:
+
+.. literalinclude:: ../../../examples/python/uart_receiver.py
+ :prepend: import mraa
+ :start-after: import mraa
diff --git a/peripheral/libmraa/src/spi/spi.c b/peripheral/libmraa/src/spi/spi.c
index d270451..384cc20 100644
--- a/peripheral/libmraa/src/spi/spi.c
+++ b/peripheral/libmraa/src/spi/spi.c
@@ -77,35 +77,37 @@ mraa_spi_init(int bus)
}
}
- int pos = plat->spi_bus[bus].sclk;
- if (plat->pins[pos].spi.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplexer");
- return NULL;
+ if (!plat->no_bus_mux) {
+ int pos = plat->spi_bus[bus].sclk;
+ if (plat->pins[pos].spi.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplexer");
+ return NULL;
+ }
}
- }
- pos = plat->spi_bus[bus].mosi;
- if (plat->pins[pos].spi.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplexer");
- return NULL;
+ pos = plat->spi_bus[bus].mosi;
+ if (plat->pins[pos].spi.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplexer");
+ return NULL;
+ }
}
- }
- pos = plat->spi_bus[bus].miso;
- if (plat->pins[pos].spi.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "spi: failed to set-up spi miso multiplexer");
- return NULL;
+ pos = plat->spi_bus[bus].miso;
+ if (plat->pins[pos].spi.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "spi: failed to set-up spi miso multiplexer");
+ return NULL;
+ }
}
- }
- pos = plat->spi_bus[bus].cs;
- if (plat->pins[pos].spi.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "spi: failed to set-up spi cs multiplexer");
- return NULL;
+ pos = plat->spi_bus[bus].cs;
+ if (plat->pins[pos].spi.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "spi: failed to set-up spi cs multiplexer");
+ return NULL;
+ }
}
}
mraa_spi_context dev = mraa_spi_init_raw(plat->spi_bus[bus].bus_id, plat->spi_bus[bus].slave_s);
diff --git a/peripheral/libmraa/src/uart/uart.c b/peripheral/libmraa/src/uart/uart.c
index 5fc0cc1..6d3973a 100644
--- a/peripheral/libmraa/src/uart/uart.c
+++ b/peripheral/libmraa/src/uart/uart.c
@@ -152,22 +152,24 @@ mraa_uart_init(int index)
return NULL;
}
- int pos = plat->uart_dev[index].rx;
- if (pos >= 0) {
- if (plat->pins[pos].uart.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "uart: failed to setup muxes for RX pin");
- return NULL;
+ if (!plat->no_bus_mux) {
+ int pos = plat->uart_dev[index].rx;
+ if (pos >= 0) {
+ if (plat->pins[pos].uart.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "uart: failed to setup muxes for RX pin");
+ return NULL;
+ }
}
}
- }
- pos = plat->uart_dev[index].tx;
- if (pos >= 0) {
- if (plat->pins[pos].uart.mux_total > 0) {
- if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
- syslog(LOG_ERR, "uart: failed to setup muxes for TX pin");
- return NULL;
+ pos = plat->uart_dev[index].tx;
+ if (pos >= 0) {
+ if (plat->pins[pos].uart.mux_total > 0) {
+ if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) {
+ syslog(LOG_ERR, "uart: failed to setup muxes for TX pin");
+ return NULL;
+ }
}
}
}
@@ -423,7 +425,25 @@ mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar)
return MRAA_ERROR_INVALID_HANDLE;
}
- return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
+ struct termios termio;
+ // get current modes
+ if (tcgetattr(dev->fd, &termio)) {
+ syslog(LOG_ERR, "uart: tcgetattr() failed");
+ return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
+ }
+ if (read > 0) {
+ read = read / 100;
+ if (read == 0)
+ read = 1;
+ }
+ termio.c_lflag &= ~ICANON; /* Set non-canonical mode */
+ termio.c_cc[VTIME] = read; /* Set timeout in tenth seconds */
+ if (tcsetattr(dev->fd, TCSANOW, &termio) < 0) {
+ syslog(LOG_ERR, "uart: tcsetattr() failed");
+ return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
+ }
+
+ return MRAA_SUCCESS;
}
const char*
diff --git a/peripheral/libmraa/src/usb/ftdi_ft4222.c b/peripheral/libmraa/src/usb/ftdi_ft4222.c
index b88294a..26b6735 100644
--- a/peripheral/libmraa/src/usb/ftdi_ft4222.c
+++ b/peripheral/libmraa/src/usb/ftdi_ft4222.c
@@ -25,6 +25,7 @@
#include <stdlib.h>
#include <string.h>
#include <time.h>
+#include <sys/time.h>
#include <errno.h>
#include "linux/i2c-dev.h"
#include "common.h"
@@ -35,18 +36,26 @@
#define PLATFORM_NAME "FTDI FT4222"
#define I2CM_ERROR(status) (((status) &0x02) != 0)
#define PCA9672_ADDR 0x20
-
-
-static FT_HANDLE ftHandleGPIO = (FT_HANDLE) NULL; //GPIO Handle
-static FT_HANDLE ftHandle = (FT_HANDLE) NULL; //I2C/SPI Handle
+#define PCA9545_ADDR 0x70
+#define PCA9672_PINS 8
+#define PCA9545_BUSSES 4
+#define GPIO_PORT_IO_RESET GPIO_PORT2
+#define GPIO_PORT_IO_STATUS GPIO_PORT3
+
+static FT_HANDLE ftHandleGpio = (FT_HANDLE) NULL; //GPIO Handle
+static FT_HANDLE ftHandleI2c = (FT_HANDLE) NULL; //I2C/SPI Handle
+static FT_HANDLE ftHandleSpi = (FT_HANDLE) NULL; //I2C/SPI Handle
static GPIO_Dir pinDirection[] = {GPIO_OUTPUT, GPIO_OUTPUT, GPIO_OUTPUT, GPIO_OUTPUT};
static int bus_speed = 400;
-static int numI2cGpioExpanderPins;
+static int numFt4222GpioPins = 4;
+static int numI2cGpioExpanderPins = 8;
+static int numI2cSwitchBusses = 4;
+static int currentI2cBus = 0;
mraa_result_t
mraa_ftdi_ft4222_init()
{
- mraa_result_t mraaStatus = MRAA_SUCCESS;
+ mraa_result_t mraaStatus = MRAA_ERROR_NO_RESOURCES;
FT_DEVICE_LIST_INFO_NODE* devInfo = NULL;
FT_STATUS ftStatus;
DWORD numDevs = 0;
@@ -56,96 +65,87 @@ mraa_ftdi_ft4222_init()
ftStatus = FT_CreateDeviceInfoList(&numDevs);
if (ftStatus != FT_OK) {
syslog(LOG_ERR, "FT_CreateDeviceInfoList failed: error code %d\n", ftStatus);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
- goto init_exit;
- }
-
- if (numDevs == 0) {
- syslog(LOG_ERR, "No FT4222 devices connected.\n");
goto init_exit;
}
devInfo = calloc((size_t) numDevs, sizeof(FT_DEVICE_LIST_INFO_NODE));
if (devInfo == NULL) {
syslog(LOG_ERR, "FT4222 allocation failure.\n");
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
ftStatus = FT_GetDeviceInfoList(devInfo, &numDevs);
+ syslog(LOG_NOTICE, "FT_GetDeviceInfoList returned %d devices\n", numDevs);
if (ftStatus != FT_OK) {
syslog(LOG_ERR, "FT_GetDeviceInfoList failed (error code %d)\n", (int) ftStatus);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
-
- /*
- FT4222_Version ft4222Version;
- FT4222_STATUS ft4222Status = FT4222_GetVersion(ftHandle, &ft4222Version);
- if (FT4222_OK == ft4222Status){
- syslog(LOG_NOTICE, "FT4222_GetVersion %08X %08X\n", ft4222Version.chipVersion,
- ft4222Version.dllVersion);
- } else
- syslog(LOG_ERR, "FT4222_GetVersion failed with code %d", ft4222Status);
- */
-
- syslog(LOG_NOTICE, "FT_GetDeviceInfoList returned %d devices\n", numDevs);
-
+ if (numDevs < 2) {
+ syslog(LOG_ERR, "No FT4222 devices connected.\n");
+ goto init_exit;
+ }
if(numDevs > 2) {
syslog(LOG_ERR, "CNFMODE not supported. Valid modes are 0 or 3.\n");
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
- // CNFMODE 0, GPIO interface available.
- if(numDevs = 2) {
- ftStatus = FT_OpenEx((PVOID)(uintptr_t) devInfo[1].LocId, FT_OPEN_BY_LOCATION, &ftHandleGPIO);
- if (ftStatus != FT_OK) {
- syslog(LOG_ERR, "FT_OpenEx GPIO handle failed (error %d)\n", (int) ftStatus);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
- goto init_exit;
- }
+ // FIXME: Assumes just one physical FTDI device present
+ DWORD locationIdI2c = 0;
+ DWORD locationIdGpio = 0;
+ if (devInfo[0].Type == FT_DEVICE_4222H_0)
+ locationIdI2c = devInfo[0].LocId;
+ if (devInfo[1].Type == FT_DEVICE_4222H_0)
+ locationIdGpio = devInfo[1].LocId;
- // Disable Suspend and Wake on GPIO2 & GPIO3
- FT4222_SetSuspendOut(ftHandleGPIO, 0);
- FT4222_SetWakeUpInterrupt(ftHandleGPIO, 0);
+ if (locationIdI2c == 0) {
+ syslog(LOG_ERR, "FT_GetDeviceInfoList contains no I2C controllers\n");
+ goto init_exit;
+ }
- ftStatus = FT4222_GPIO_Init(ftHandleGPIO, pinDirection);
- if (ftStatus != FT_OK) {
- syslog(LOG_ERR, "FT4222_GPIO_Init failed (error %d)\n", (int) ftStatus);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
- goto init_exit;
- }
+ if (locationIdGpio == 0) {
+ syslog(LOG_ERR, "FT_GetDeviceInfoList contains no GPIO controllers\n");
+ goto init_exit;
+ }
+
+ ftStatus = FT_OpenEx((PVOID)(uintptr_t) locationIdI2c, FT_OPEN_BY_LOCATION, &ftHandleI2c);
+ if (ftStatus != FT_OK) {
+ syslog(LOG_ERR, "FT_OpenEx failed (error %d)\n", (int) ftStatus);
+ goto init_exit;
}
- // I2C or SPI interface.
- ftStatus = FT_OpenEx((PVOID)(uintptr_t) devInfo[0].LocId, FT_OPEN_BY_LOCATION, &ftHandle);
+ ftStatus = FT_OpenEx((PVOID)(uintptr_t) locationIdGpio, FT_OPEN_BY_LOCATION, &ftHandleGpio);
if (ftStatus != FT_OK) {
- syslog(LOG_ERR, "FT_OpenEx I2C handle failed (error %d)\n", (int) ftStatus);
+ syslog(LOG_ERR, "FT_OpenEx failed (error %d)\n", (int) ftStatus);
+ goto init_exit;
+ }
+
+ FT4222_SetSuspendOut(ftHandleGpio, 0);
+ FT4222_SetWakeUpInterrupt(ftHandleGpio, 0);
+ ftStatus = FT4222_GPIO_Init(ftHandleGpio, pinDirection);
+ if (ftStatus != FT_OK) {
+ syslog(LOG_ERR, "FT4222_GPIO_Init failed (error %d)\n", (int) ftStatus);
mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
// Tell the FT4222 to be an I2C Master by default on init.
- FT4222_STATUS ft4222Status = FT4222_I2CMaster_Init(ftHandle, bus_speed);
+ FT4222_STATUS ft4222Status = FT4222_I2CMaster_Init(ftHandleI2c, bus_speed);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_I2CMaster_Init failed (error %d)!\n", ft4222Status);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
- // Reset the I2CM registers to a known state.
- ft4222Status = FT4222_I2CMaster_Reset(ftHandle);
+ ft4222Status = FT4222_I2CMaster_Reset(ftHandleI2c);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_I2CMaster_Reset failed (error %d)!\n", ft4222Status);
- mraaStatus = MRAA_ERROR_NO_RESOURCES;
goto init_exit;
}
+ mraaStatus = MRAA_SUCCESS;
+
init_exit:
if (devInfo != NULL)
- ;
- free(devInfo);
+ free(devInfo);
if (mraaStatus == MRAA_SUCCESS)
syslog(LOG_NOTICE, "mraa_ftdi_ft4222_init completed successfully\n");
return mraaStatus;
@@ -155,25 +155,27 @@ init_exit:
mraa_result_t
mraa_ftdi_ft4222_get_version(unsigned int* versionChip, unsigned int* versionLib)
{
- if (ftHandle != NULL) {
+ if (ftHandleI2c != NULL) {
FT4222_Version ft4222Version;
- FT4222_STATUS ft4222Status = FT4222_GetVersion(ftHandle, &ft4222Version);
+ FT4222_STATUS ft4222Status = FT4222_GetVersion(ftHandleI2c, &ft4222Version);
if (FT4222_OK == ft4222Status) {
*versionChip = (unsigned int) ft4222Version.chipVersion;
*versionLib = (unsigned int) ft4222Version.dllVersion;
syslog(LOG_NOTICE, "FT4222_GetVersion %08X %08X\n", *versionChip, *versionLib);
return MRAA_SUCCESS;
} else {
- syslog(LOG_ERR, "libmraa: FT4222_GetVersion failed (error %d)\n", (int) ft4222Status);
+ syslog(LOG_ERR, "FT4222_GetVersion failed (error %d)\n", (int) ft4222Status);
return MRAA_ERROR_NO_RESOURCES;
}
} else {
- syslog(LOG_ERR, "libmraa: bad FT4222 handle\n");
+ syslog(LOG_ERR, "Bad FT4222 handle\n");
return MRAA_ERROR_INVALID_HANDLE;
}
}
+/******************* Private I2C functions *******************/
+
static int
mraa_ftdi_ft4222_i2c_read_internal(FT_HANDLE handle, uint8_t addr, uint8_t* data, int length)
{
@@ -181,9 +183,10 @@ mraa_ftdi_ft4222_i2c_read_internal(FT_HANDLE handle, uint8_t addr, uint8_t* data
uint8 controllerStatus;
// syslog(LOG_NOTICE, "FT4222_I2CMaster_Read(%#02X, %#02X)", addr, length);
FT4222_STATUS ft4222Status = FT4222_I2CMaster_Read(handle, addr, data, length, &bytesRead);
- ft4222Status = FT4222_I2CMaster_GetStatus(ftHandle, &controllerStatus);
+ ft4222Status = FT4222_I2CMaster_GetStatus(ftHandleI2c, &controllerStatus);
if (FT4222_OK != ft4222Status || I2CM_ERROR(controllerStatus)) {
- syslog(LOG_ERR, "FT4222_I2CMaster_Read failed (error %d)\n", (int) ft4222Status);
+ syslog(LOG_ERR, "FT4222_I2CMaster_Read failed for address %#02x\n", addr);
+ FT4222_I2CMaster_Reset(handle);
return 0;
}
return bytesRead;
@@ -195,11 +198,11 @@ mraa_ftdi_ft4222_i2c_write_internal(FT_HANDLE handle, uint8_t addr, const uint8_
uint16 bytesWritten = 0;
uint8 controllerStatus;
// syslog(LOG_NOTICE, "FT4222_I2CMaster_Write(%#02X, %#02X, %d)", addr, *data, bytesToWrite);
- FT4222_STATUS ft4222Status =
- FT4222_I2CMaster_Write(handle, addr, (uint8_t*) data, bytesToWrite, &bytesWritten);
- ft4222Status = FT4222_I2CMaster_GetStatus(ftHandle, &controllerStatus);
+ FT4222_STATUS ft4222Status = FT4222_I2CMaster_Write(handle, addr, (uint8_t*) data, bytesToWrite, &bytesWritten);
+ ft4222Status = FT4222_I2CMaster_GetStatus(ftHandleI2c, &controllerStatus);
if (FT4222_OK != ft4222Status || I2CM_ERROR(controllerStatus)) {
- syslog(LOG_ERR, "FT4222_I2CMaster_Write failed (error %d)\n", (int) ft4222Status);
+ syslog(LOG_ERR, "FT4222_I2CMaster_Write failed address %#02x\n", addr);
+ FT4222_I2CMaster_Reset(handle);
return 0;
}
@@ -209,70 +212,136 @@ mraa_ftdi_ft4222_i2c_write_internal(FT_HANDLE handle, uint8_t addr, const uint8_
return bytesWritten;
}
-// Function detects known I2C expanders and returns the number of GPIO pins on expander
+
+// Function detects known I2C I/O expanders and returns the number of GPIO pins on expander
static int
mraa_ftdi_ft4222_detect_io_expander()
{
uint8_t data;
- if(mraa_ftdi_ft4222_i2c_read_internal(ftHandle, PCA9672_ADDR, &data, 1) == 1) {
- return 8;
+ if(mraa_ftdi_ft4222_i2c_read_internal(ftHandleI2c, PCA9672_ADDR, &data, 1) == 1) {
+ return PCA9672_PINS;
}
return 0;
}
-/******************* I2C functions *******************/
-// Function not currently mapped or used since we have virtual pin definitions
-static mraa_i2c_context
-mraa_ftdi_ft4222_i2c_init_raw_replace(unsigned int bus)
+static mraa_boolean_t
+mraa_ftdi_ft4222_is_internal_gpio(int pin)
{
- // Tell the FT4222 to be an I2C Master.
- FT4222_STATUS ft4222Status = FT4222_I2CMaster_Init(ftHandle, bus_speed);
- if (FT4222_OK != ft4222Status) {
- syslog(LOG_ERR, "FT4222_I2CMaster_Init failed (error %d)!\n", ft4222Status);
- return NULL;
- }
+ return pin < numFt4222GpioPins;
+}
- // Reset the I2CM registers to a known state.
- ft4222Status = FT4222_I2CMaster_Reset(ftHandle);
- if (FT4222_OK != ft4222Status) {
- syslog(LOG_ERR, "FT4222_I2CMaster_Reset failed (error %d)!\n", ft4222Status);
- return NULL;
+
+static mraa_result_t
+ftdi_ft4222_set_internal_gpio_dir(int pin, GPIO_Dir direction)
+{
+ pinDirection[pin] = direction;
+ if (FT4222_GPIO_Init(ftHandleGpio, pinDirection) != FT4222_OK)
+ return MRAA_ERROR_UNSPECIFIED;
+ else
+ return MRAA_SUCCESS;
+}
+
+// Function detects known I2C switches and returns the number of busses.
+// On startup switch is disabled so default bus will be integrated i2c bus.
+static int
+mraa_ftdi_ft4222_detect_i2c_switch()
+{
+ uint8_t data;
+ if(mraa_ftdi_ft4222_i2c_read_internal(ftHandleI2c, PCA9545_ADDR, &data, 1) == 1) {
+ data = 0;
+ return mraa_ftdi_ft4222_i2c_write_internal(ftHandleI2c, PCA9545_ADDR, &data, 1) == 1 ? PCA9545_BUSSES : 0;
}
+ return 0;
+}
- mraa_i2c_context dev = (mraa_i2c_context) malloc(sizeof(struct _i2c));
- if (dev == NULL) {
- syslog(LOG_CRIT, "i2c: Failed to allocate memory for context");
- return NULL;
+
+static mraa_result_t
+mraa_ftdi_ft4222_i2c_select_bus(int bus)
+{
+ if (bus != currentI2cBus) {
+ uint8_t data;
+ if (bus == 0)
+ data = 0;
+ else
+ data = 1 << (bus-1);
+ if (mraa_ftdi_ft4222_i2c_write_internal(ftHandleI2c, PCA9545_ADDR, &data, 1) == 1)
+ currentI2cBus = bus;
+ else
+ return MRAA_ERROR_UNSPECIFIED;
}
+ return MRAA_SUCCESS;
+}
- dev->handle = ftHandle;
- dev->fh = -1; // We don't use file descriptors
- dev->funcs = I2C_FUNC_I2C; // Advertise minimal i2c support as per
- // https://www.kernel.org/doc/Documentation/i2c/functionality
- return dev;
+static int
+mraa_ftdi_ft4222_i2c_context_read(mraa_i2c_context dev, uint8_t* data, int length)
+{
+ if (mraa_ftdi_ft4222_i2c_select_bus(dev->busnum) == MRAA_SUCCESS)
+ return mraa_ftdi_ft4222_i2c_read_internal(dev->handle, dev->addr, data, length);
+ else
+ return 0;
}
+static int
+mraa_ftdi_ft4222_i2c_context_write(mraa_i2c_context dev, uint8_t* data, int length)
+{
+ if (mraa_ftdi_ft4222_i2c_select_bus(dev->busnum) == MRAA_SUCCESS)
+ return mraa_ftdi_ft4222_i2c_write_internal(dev->handle, dev->addr, data, length);
+ else
+ return 0;
+}
+
+
+static void
+mraa_ftdi_ft4222_sleep_ms(unsigned long mseconds)
+{
+ struct timespec sleepTime;
+
+ sleepTime.tv_sec = mseconds / 1000; // Number of seconds
+ sleepTime.tv_nsec = (mseconds % 1000) * 1000000; // Convert fractional seconds to nanoseconds
+
+ // Iterate nanosleep in a loop until the total sleep time is the original
+ // value of the seconds parameter
+ while ((nanosleep(&sleepTime, &sleepTime) != 0) && (errno == EINTR))
+ ;
+}
+
+static unsigned int
+mraa_ftdi_ft4222_get_tick_count_ms()
+{
+ static unsigned int startTick = 0;
+ unsigned int ticks;
+ struct timeval now;
+ gettimeofday(&now, NULL);
+ ticks = now.tv_sec * 1000;
+ ticks += now.tv_usec / 1000;
+ if (startTick == 0)
+ startTick = ticks;
+ return ticks - startTick;
+}
+
+
+/******************* I2C functions *******************/
+
static mraa_result_t
mraa_ftdi_ft4222_i2c_init_bus_replace(mraa_i2c_context dev)
{
// Tell the FT4222 to be an I2C Master.
- FT4222_STATUS ft4222Status = FT4222_I2CMaster_Init(ftHandle, 400);
+ FT4222_STATUS ft4222Status = FT4222_I2CMaster_Init(ftHandleI2c, bus_speed);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_I2CMaster_Init failed (error %d)!\n", ft4222Status);
return MRAA_ERROR_NO_RESOURCES;
}
// Reset the I2CM registers to a known state.
- ft4222Status = FT4222_I2CMaster_Reset(ftHandle);
+ ft4222Status = FT4222_I2CMaster_Reset(ftHandleI2c);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_I2CMaster_Reset failed (error %d)!\n", ft4222Status);
return MRAA_ERROR_NO_RESOURCES;
}
syslog(LOG_NOTICE, "I2C interface enabled GPIO0 and GPIO1 will be unavailable.\n");
-
- dev->handle = ftHandle;
+ dev->handle = ftHandleI2c;
dev->fh = -1; // We don't use file descriptors
dev->funcs = I2C_FUNC_I2C; // Advertise minimal i2c support as per
// https://www.kernel.org/doc/Documentation/i2c/functionality
@@ -294,7 +363,7 @@ mraa_ftdi_ft4222_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode)
bus_speed = 3400;
break;
}
- return MRAA_SUCCESS;
+ return FT4222_I2CMaster_Init(ftHandleI2c, bus_speed) == FT4222_OK ? MRAA_SUCCESS : MRAA_ERROR_NO_RESOURCES;
}
@@ -302,7 +371,7 @@ static mraa_result_t
mraa_ftdi_ft4222_i2c_address(mraa_i2c_context dev, uint8_t addr)
{
dev->addr = (int) addr;
- return FT4222_I2CMaster_Init(ftHandle, bus_speed) == FT4222_OK ? MRAA_SUCCESS : MRAA_ERROR_NO_RESOURCES;
+ return MRAA_SUCCESS;
}
@@ -316,7 +385,7 @@ static uint8_t
mraa_ftdi_ft4222_i2c_read_byte(mraa_i2c_context dev)
{
uint8_t data;
- if (mraa_ftdi_ft4222_i2c_read_internal(dev->handle, dev->addr, &data, 1) == 1)
+ if (mraa_ftdi_ft4222_i2c_context_read(dev, &data, 1) == 1)
return data;
else
return 0;
@@ -328,9 +397,9 @@ mraa_ftdi_ft4222_i2c_read_word_data(mraa_i2c_context dev, uint8_t command)
{
uint8_t buf[2];
uint16_t data;
- if (mraa_ftdi_ft4222_i2c_write_internal(dev->handle, dev->addr, &command, 1) != 1)
+ if (mraa_ftdi_ft4222_i2c_context_write(dev, &command, 1) != 1)
return 0;
- if (mraa_ftdi_ft4222_i2c_read_internal(dev->handle, dev->addr, buf, 2) != 2)
+ if (mraa_ftdi_ft4222_i2c_context_read(dev, buf, 2) != 2)
return 0;
data = *(uint16_t*)buf;
return data;
@@ -339,16 +408,16 @@ mraa_ftdi_ft4222_i2c_read_word_data(mraa_i2c_context dev, uint8_t command)
static int
mraa_ftdi_ft4222_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length)
{
- if (mraa_ftdi_ft4222_i2c_write_internal(dev->handle, dev->addr, &command, 1) != 1)
+ if (mraa_ftdi_ft4222_i2c_context_write(dev, &command, 1) != 1)
return 0;
- return mraa_ftdi_ft4222_i2c_read_internal(dev->handle, dev->addr, data, length);
+ return mraa_ftdi_ft4222_i2c_context_read(dev, data, length);
}
static mraa_result_t
mraa_ftdi_ft4222_i2c_write(mraa_i2c_context dev, const uint8_t* data, int bytesToWrite)
{
- uint16 bytesWritten = mraa_ftdi_ft4222_i2c_write_internal(dev->handle, dev->addr, data, bytesToWrite);
+ uint16 bytesWritten = mraa_ftdi_ft4222_i2c_context_write(dev, (uint8_t*)data, bytesToWrite);
return bytesToWrite == bytesWritten ? MRAA_SUCCESS : MRAA_ERROR_INVALID_HANDLE;
}
@@ -400,13 +469,14 @@ mraa_ftdi_ft4222_i2c_stop(mraa_i2c_context dev)
/******************* GPIO functions *******************/
static mraa_result_t
-mraa_ftdi_ft4222_gpio_init_internal_replace(int pin)
+mraa_ftdi_ft4222_gpio_init_internal_replace(mraa_gpio_context dev, int pin)
{
- if ((pin - numI2cGpioExpanderPins) == 0 || (pin - numI2cGpioExpanderPins) == 1) {
+ dev->phy_pin = (pin < numFt4222GpioPins) ? pin : pin - numFt4222GpioPins;
+ if (pin < 2) {
syslog(LOG_NOTICE, "Closing I2C interface to enable GPIO%d\n", pin);
/* Replace with call to SPI init when SPI is fully implemented */
- FT4222_STATUS ft4222Status = FT4222_SPIMaster_Init(ftHandle, SPI_IO_SINGLE, CLK_DIV_4, CLK_IDLE_HIGH, CLK_LEADING, 0x01);
+ FT4222_STATUS ft4222Status = FT4222_SPIMaster_Init(ftHandleSpi, SPI_IO_SINGLE, CLK_DIV_4, CLK_IDLE_HIGH, CLK_LEADING, 0x01);
if (FT4222_OK != ft4222Status){
syslog(LOG_ERR, "Failed to close I2C interface and start SPI (error %d)!\n", ft4222Status);
return MRAA_ERROR_NO_RESOURCES;
@@ -430,13 +500,11 @@ mraa_ftdi_ft4222_gpio_edge_mode_replace(mraa_gpio_context dev, mraa_gpio_edge_t
static int
mraa_ftdi_ft4222_gpio_read_replace(mraa_gpio_context dev)
{
- uint8_t pin = dev->phy_pin;
- uint8_t mask = 1 << pin;
- uint8_t value;
-
- if(pin >= numI2cGpioExpanderPins) {
+ uint8_t pin = dev->pin;
+ if (mraa_ftdi_ft4222_is_internal_gpio(pin)) {
// FTDI GPIO
- FT4222_STATUS ft4222Status = FT4222_GPIO_Read(ftHandleGPIO, (pin - numI2cGpioExpanderPins), (BOOL*)&value);
+ BOOL value;
+ FT4222_STATUS ft4222Status = FT4222_GPIO_Read(ftHandleGpio, dev->phy_pin, &value);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_GPIO_Read failed (error %d)!\n", ft4222Status);
return -1;
@@ -445,7 +513,9 @@ mraa_ftdi_ft4222_gpio_read_replace(mraa_gpio_context dev)
}
else {
// Expander GPIO
- if (mraa_ftdi_ft4222_i2c_read_internal(ftHandle, PCA9672_ADDR, &value, 1) != 1)
+ uint8_t mask = 1 << dev->phy_pin;
+ uint8_t value;
+ if (mraa_ftdi_ft4222_i2c_read_internal(ftHandleI2c, PCA9672_ADDR, &value, 1) != 1)
return -1;
return (value & mask) == mask;
}
@@ -455,13 +525,10 @@ mraa_ftdi_ft4222_gpio_read_replace(mraa_gpio_context dev)
static mraa_result_t
mraa_ftdi_ft4222_gpio_write_replace(mraa_gpio_context dev, int write_value)
{
- uint8_t pin = dev->phy_pin;
- uint8_t mask = 1 << pin;
- uint8_t value;
-
- if(pin >= numI2cGpioExpanderPins) {
+ uint8_t pin = dev->pin;
+ if (mraa_ftdi_ft4222_is_internal_gpio(pin)) {
// FTDI GPIO
- FT4222_STATUS ft4222Status = FT4222_GPIO_Write(ftHandleGPIO, (pin - numI2cGpioExpanderPins), write_value);
+ FT4222_STATUS ft4222Status = FT4222_GPIO_Write(ftHandleGpio, dev->phy_pin, write_value);
if (FT4222_OK != ft4222Status) {
syslog(LOG_ERR, "FT4222_GPIO_Write failed (error %d)!\n", ft4222Status);
return MRAA_ERROR_UNSPECIFIED;
@@ -469,16 +536,17 @@ mraa_ftdi_ft4222_gpio_write_replace(mraa_gpio_context dev, int write_value)
}
else {
// Expander GPIO
- if (mraa_ftdi_ft4222_i2c_read_internal(ftHandle, PCA9672_ADDR, &value, 1) != 1)
+ uint8_t mask = 1 << dev->phy_pin;
+ uint8_t value;
+ if (mraa_ftdi_ft4222_i2c_read_internal(ftHandleI2c, PCA9672_ADDR, &value, 1) != 1)
return MRAA_ERROR_UNSPECIFIED;
if (write_value == 1)
value |= mask;
else
value &= (~mask);
- if (mraa_ftdi_ft4222_i2c_write_internal(ftHandle, PCA9672_ADDR, &value, 1) != 1)
+ if (mraa_ftdi_ft4222_i2c_write_internal(ftHandleI2c, PCA9672_ADDR, &value, 1) != 1)
return MRAA_ERROR_UNSPECIFIED;
}
-
return MRAA_SUCCESS;
}
@@ -487,30 +555,24 @@ mraa_ftdi_ft4222_gpio_dir_replace(mraa_gpio_context dev, mraa_gpio_dir_t dir)
{
switch (dir) {
case MRAA_GPIO_IN:
- if (dev->phy_pin >= numI2cGpioExpanderPins) {
- pinDirection[dev->phy_pin - numI2cGpioExpanderPins] = GPIO_INPUT;
- if (FT4222_GPIO_Init(ftHandleGPIO, pinDirection) != FT4222_OK)
- return MRAA_ERROR_UNSPECIFIED;
- }
- return MRAA_SUCCESS;
+ if (mraa_ftdi_ft4222_is_internal_gpio(dev->pin))
+ return ftdi_ft4222_set_internal_gpio_dir(dev->phy_pin, GPIO_INPUT);
+ else
+ return mraa_ftdi_ft4222_gpio_write_replace(dev, 1);
case MRAA_GPIO_OUT:
- if (dev->phy_pin >= numI2cGpioExpanderPins) {
- pinDirection[dev->phy_pin - numI2cGpioExpanderPins] = GPIO_OUTPUT;
- if (FT4222_GPIO_Init(ftHandleGPIO, pinDirection) != FT4222_OK)
- return MRAA_ERROR_UNSPECIFIED;
- }
- return MRAA_SUCCESS;
+ if (mraa_ftdi_ft4222_is_internal_gpio(dev->pin))
+ return ftdi_ft4222_set_internal_gpio_dir(dev->phy_pin, GPIO_OUTPUT);
+ else
+ return MRAA_SUCCESS;
case MRAA_GPIO_OUT_HIGH:
- if (dev->phy_pin >= numI2cGpioExpanderPins) {
- pinDirection[dev->phy_pin - numI2cGpioExpanderPins] = GPIO_OUTPUT;
- if (FT4222_GPIO_Init(ftHandleGPIO, pinDirection) != FT4222_OK)
+ if (mraa_ftdi_ft4222_is_internal_gpio(dev->pin)) {
+ if (ftdi_ft4222_set_internal_gpio_dir(dev->phy_pin, GPIO_OUTPUT) != MRAA_SUCCESS)
return MRAA_ERROR_UNSPECIFIED;
}
return mraa_ftdi_ft4222_gpio_write_replace(dev, 1);
case MRAA_GPIO_OUT_LOW:
- if (dev->phy_pin >= numI2cGpioExpanderPins) {
- pinDirection[dev->phy_pin - numI2cGpioExpanderPins] = GPIO_OUTPUT;
- if (FT4222_GPIO_Init(ftHandleGPIO, pinDirection) != FT4222_OK)
+ if (mraa_ftdi_ft4222_is_internal_gpio(dev->pin)) {
+ if (ftdi_ft4222_set_internal_gpio_dir(dev->phy_pin, GPIO_OUTPUT) != MRAA_SUCCESS)
return MRAA_ERROR_UNSPECIFIED;
}
return mraa_ftdi_ft4222_gpio_write_replace(dev, 0);
@@ -519,23 +581,37 @@ mraa_ftdi_ft4222_gpio_dir_replace(mraa_gpio_context dev, mraa_gpio_dir_t dir)
}
}
-static void
-mraa_ftdi_ft4222_sleep_ms(unsigned long mseconds)
-{
- struct timespec sleepTime;
-
- sleepTime.tv_sec = mseconds / 1000; // Number of seconds
- sleepTime.tv_nsec = (mseconds % 1000) * 1000000; // Convert fractional seconds to nanoseconds
-
- // Iterate nanosleep in a loop until the total sleep time is the original
- // value of the seconds parameter
- while ((nanosleep(&sleepTime, &sleepTime) != 0) && (errno == EINTR))
- ;
-}
static void*
mraa_ftdi_ft4222_gpio_interrupt_handler_replace(mraa_gpio_context dev)
{
+#ifdef USE_FT4222_GPIO_TRIGGER
+ // FIXME: Use big buffer; shouldn't be more than this many events to read
+ GPIO_Trigger event_buf[256];
+ int prev_level = mraa_ftdi_ft4222_gpio_read_replace(dev);
+ while (1) {
+ uint16 num_events = 0;
+ FT4222_STATUS status = FT4222_GPIO_GetTriggerStatus(ftHandleGpio, GPIO_PORT_IO_STATUS, &num_events);
+ if (status != FT4222_OK)
+ printf("FT4222_GPIO_GetTriggerStatus failed with code %d\n", status);
+ printf("%u: FT4222_GPIO_GetTriggerStatus Events = %d\n", mraa_ftdi_ft4222_get_tick_count_ms(), num_events);
+ if (num_events > 0) {
+ int level = mraa_ftdi_ft4222_gpio_read_replace(dev);
+ uint16 num_events_read;
+ FT4222_GPIO_ReadTriggerQueue(ftHandleGpio, GPIO_PORT_IO_STATUS, event_buf, num_events, &num_events_read);
+ // printf("%u: FT4222_GPIO_ReadTriggerQueue Events= %d\n", mraa_ftdi_ft4222_get_tick_count_ms(), num_events_read);
+ printf("%u: level = %d\n", mraa_ftdi_ft4222_get_tick_count_ms(), level);
+ if (level != prev_level) {
+ dev->isr(dev->isr_args);
+ prev_level = level;
+ }
+
+ }
+ mraa_ftdi_ft4222_sleep_ms(20);
+ // int level = mraa_ftdi_ft4222_gpio_read_replace(dev);
+ // printf("level = %d\n", level);
+ }
+#else
int prev_level = mraa_ftdi_ft4222_gpio_read_replace(dev);
while (1) {
int level = mraa_ftdi_ft4222_gpio_read_replace(dev);
@@ -544,9 +620,9 @@ mraa_ftdi_ft4222_gpio_interrupt_handler_replace(mraa_gpio_context dev)
dev->isr(dev->isr_args);
prev_level = level;
}
- // printf("mraa_ftdi_ft4222_gpio_interrupt_handler_replace\n");
mraa_ftdi_ft4222_sleep_ms(100);
}
+#endif
return NULL;
}
@@ -589,42 +665,38 @@ mraa_ftdi_ft4222()
return NULL;
numI2cGpioExpanderPins = mraa_ftdi_ft4222_detect_io_expander();
int pinIndex = 0;
- int numUsbPins = numI2cGpioExpanderPins + 4; // Add GPIO0/SDA, GPIO1/SCL, GPIO2, GPIO3
+ int numUsbGpio = numFt4222GpioPins + numI2cGpioExpanderPins;
+ int numI2cBusses = 1 + mraa_ftdi_ft4222_detect_i2c_switch();
+ int numUsbPins = numUsbGpio + 2 * (numI2cBusses-1); // Add SDA and SCL for each i2c switch bus
+ mraa_pincapabilities_t pinCapsI2c = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ mraa_pincapabilities_t pinCapsI2cGpio = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
+ mraa_pincapabilities_t pinCapsGpio = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
+
sub_plat->platform_name = PLATFORM_NAME;
sub_plat->phy_pin_count = numUsbPins;
- sub_plat->gpio_count = numUsbPins;
- mraa_pininfo_t* pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * numUsbPins);
+ sub_plat->gpio_count = numUsbGpio;
+ mraa_pininfo_t* pins = (mraa_pininfo_t*) calloc(numUsbPins,sizeof(mraa_pininfo_t));
if (pins == NULL) {
return NULL;
}
sub_plat->pins = pins;
- // Virtual gpio pins on i2c I/O expander.
- mraa_pincapabilities_t pinCapsGpio = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
- for (pinIndex = 0; pinIndex < numI2cGpioExpanderPins; ++pinIndex) {
- char name[8];
- sprintf(name, "Pin%d", pinIndex);
- strncpy(sub_plat->pins[pinIndex].name, name, 8);
- sub_plat->pins[pinIndex].capabilites = pinCapsGpio;
- sub_plat->pins[pinIndex].gpio.mux_total = 0;
- }
-
int bus = 0;
- sub_plat->i2c_bus_count = 1;
+ sub_plat->i2c_bus_count = numI2cBusses;
sub_plat->def_i2c_bus = bus;
sub_plat->i2c_bus[bus].bus_id = bus;
// I2c pins (these are virtual, entries are required to configure i2c layer)
- mraa_pincapabilities_t pinCapsI2c = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
- strncpy(sub_plat->pins[pinIndex].name, "SCL/GPIO0", 10);
- sub_plat->pins[pinIndex].capabilites = pinCapsI2c;
+ // We currently assume that GPIO 0/1 are reserved for i2c operation
+ strncpy(sub_plat->pins[pinIndex].name, "IGPIO0/SCL0", MRAA_PIN_NAME_SIZE);
+ sub_plat->pins[pinIndex].capabilites = pinCapsI2cGpio;
sub_plat->pins[pinIndex].gpio.pinmap = pinIndex;
sub_plat->pins[pinIndex].gpio.mux_total = 0;
sub_plat->pins[pinIndex].i2c.mux_total = 0;
sub_plat->i2c_bus[bus].scl = pinIndex;
pinIndex++;
- strncpy(sub_plat->pins[pinIndex].name, "SDA/GPIO1", 10);
- sub_plat->pins[pinIndex].capabilites = pinCapsI2c;
+ strncpy(sub_plat->pins[pinIndex].name, "IGPIO1/SDA0", MRAA_PIN_NAME_SIZE);
+ sub_plat->pins[pinIndex].capabilites = pinCapsI2cGpio;
sub_plat->pins[pinIndex].gpio.pinmap = pinIndex;
sub_plat->pins[pinIndex].gpio.mux_total = 0;
sub_plat->pins[pinIndex].i2c.mux_total = 0;
@@ -632,15 +704,42 @@ mraa_ftdi_ft4222()
pinIndex++;
// FTDI4222 gpio
- strncpy(sub_plat->pins[pinIndex].name, "GPIO2", 8);
+ strncpy(sub_plat->pins[pinIndex].name, "INT-GPIO2", MRAA_PIN_NAME_SIZE);
sub_plat->pins[pinIndex].capabilites = pinCapsGpio;
sub_plat->pins[pinIndex].gpio.pinmap = pinIndex;
sub_plat->pins[pinIndex].gpio.mux_total = 0;
pinIndex++;
- strncpy(sub_plat->pins[pinIndex].name, "GPIO3", 8);
+ strncpy(sub_plat->pins[pinIndex].name, "INT-GPIO3", MRAA_PIN_NAME_SIZE);
sub_plat->pins[pinIndex].capabilites = pinCapsGpio;
sub_plat->pins[pinIndex].gpio.pinmap = pinIndex;
sub_plat->pins[pinIndex].gpio.mux_total = 0;
+ pinIndex++;
+
+ // Virtual gpio pins on i2c I/O expander.
+ int i;
+ for (i = 0; i < numI2cGpioExpanderPins; ++i) {
+ snprintf(sub_plat->pins[pinIndex].name, MRAA_PIN_NAME_SIZE, "EXP-GPIO%d", i);
+ sub_plat->pins[pinIndex].capabilites = pinCapsGpio;
+ sub_plat->pins[pinIndex].gpio.pinmap = pinIndex;
+ sub_plat->pins[pinIndex].gpio.mux_total = 0;
+ pinIndex++;
+ }
+
+ // Now add any extra i2c busses behind i2c switch
+ for (bus = 1; bus < numI2cBusses; ++bus) {
+ sub_plat->i2c_bus[bus].bus_id = bus;
+ sub_plat->pins[pinIndex].i2c.mux_total = 0;
+ snprintf(sub_plat->pins[pinIndex].name, MRAA_PIN_NAME_SIZE, "SDA%d", bus);
+ sub_plat->pins[pinIndex].capabilites = pinCapsI2c;
+ sub_plat->i2c_bus[bus].sda = pinIndex;
+ pinIndex++;
+ snprintf(sub_plat->pins[pinIndex].name, MRAA_PIN_NAME_SIZE, "SCL%d", bus);
+ sub_plat->pins[pinIndex].capabilites = pinCapsI2c;
+ sub_plat->pins[pinIndex].i2c.mux_total = 0;
+ sub_plat->i2c_bus[bus].scl = pinIndex;
+ pinIndex++;
+ }
+
// Set override functions
mraa_adv_func_t* func_table = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
diff --git a/peripheral/libmraa/src/x86/intel_de3815.c b/peripheral/libmraa/src/x86/intel_de3815.c
index 762b6aa..ad7c7d3 100644
--- a/peripheral/libmraa/src/x86/intel_de3815.c
+++ b/peripheral/libmraa/src/x86/intel_de3815.c
@@ -52,7 +52,7 @@ mraa_intel_de3815()
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_DE3815_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_DE3815_PINCOUNT,sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
diff --git a/peripheral/libmraa/src/x86/intel_edison_fab_c.c b/peripheral/libmraa/src/x86/intel_edison_fab_c.c
index 6fbc2ef..27ce531 100644
--- a/peripheral/libmraa/src/x86/intel_edison_fab_c.c
+++ b/peripheral/libmraa/src/x86/intel_edison_fab_c.c
@@ -1,6 +1,7 @@
/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
@@ -788,7 +789,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
b->pwm_max_period = 218453;
b->pwm_min_period = 1;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * 56);
+ b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
return MRAA_ERROR_UNSPECIFIED;
}
@@ -1173,6 +1174,7 @@ mraa_intel_edison_fab_c()
b->phy_pin_count = 20;
b->gpio_count = 14;
b->aio_count = 6;
+ b->platform_version = "arduino";
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
@@ -1197,7 +1199,7 @@ mraa_intel_edison_fab_c()
b->adv_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
b->adv_func->spi_lsbmode_replace = &mraa_intel_edison_spi_lsbmode_replace;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_EDISON_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_EDISON_PINCOUNT, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
free(b->adv_func);
goto error;
diff --git a/peripheral/libmraa/src/x86/intel_galileo_rev_d.c b/peripheral/libmraa/src/x86/intel_galileo_rev_d.c
index f8005c9..36335f1 100644
--- a/peripheral/libmraa/src/x86/intel_galileo_rev_d.c
+++ b/peripheral/libmraa/src/x86/intel_galileo_rev_d.c
@@ -167,7 +167,7 @@ mraa_intel_galileo_rev_d()
b->adv_func->gpio_mmap_setup = &mraa_intel_galileo_g1_mmap_setup;
b->adv_func->spi_lsbmode_replace = &mraa_intel_galileo_g1_spi_lsbmode_replace;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_GALILEO_REV_D_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GALILEO_REV_D_PINCOUNT, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
free(b->adv_func);
goto error;
diff --git a/peripheral/libmraa/src/x86/intel_galileo_rev_g.c b/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
index 11742a2..9c6583c 100644
--- a/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
+++ b/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
@@ -347,7 +347,7 @@ mraa_intel_galileo_gen2()
b->adv_func->uart_init_pre = &mraa_intel_galileo_gen2_uart_init_pre;
b->adv_func->gpio_mmap_setup = &mraa_intel_galileo_g2_mmap_setup;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GALILEO_GEN_2_PINCOUNT, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
free(b->adv_func);
goto error;
diff --git a/peripheral/libmraa/src/x86/intel_minnow_byt_compatible.c b/peripheral/libmraa/src/x86/intel_minnow_byt_compatible.c
index 8fef0b9..6d62516 100644
--- a/peripheral/libmraa/src/x86/intel_minnow_byt_compatible.c
+++ b/peripheral/libmraa/src/x86/intel_minnow_byt_compatible.c
@@ -84,7 +84,7 @@ mraa_get_pin_index(mraa_board_t* board, char* name, int* pin_index)
}
mraa_board_t*
-mraa_intel_minnowboard_byt_compatible()
+mraa_intel_minnowboard_byt_compatible(mraa_boolean_t turbot)
{
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
@@ -96,10 +96,15 @@ mraa_intel_minnowboard_byt_compatible()
}
b->platform_name = PLATFORM_NAME;
+ if (turbot) {
+ b->platform_version = "Turbot";
+ } else {
+ b->platform_version = "Ax";
+ }
b->phy_pin_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
b->gpio_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_MINNOW_MAX_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_MINNOW_MAX_PINCOUNT, sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
goto error;
}
diff --git a/peripheral/libmraa/src/x86/intel_nuc5.c b/peripheral/libmraa/src/x86/intel_nuc5.c
index 8562649..840dd98 100644
--- a/peripheral/libmraa/src/x86/intel_nuc5.c
+++ b/peripheral/libmraa/src/x86/intel_nuc5.c
@@ -51,7 +51,7 @@ mraa_intel_nuc5()
goto error;
}
- b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_NUC5_PINCOUNT);
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_NUC5_PINCOUNT,sizeof(mraa_pininfo_t));
if (b->pins == NULL) {
free(b->adv_func);
goto error;
diff --git a/peripheral/libmraa/src/x86/intel_sofia_3gr.c b/peripheral/libmraa/src/x86/intel_sofia_3gr.c
new file mode 100644
index 0000000..cc8a54d
--- /dev/null
+++ b/peripheral/libmraa/src/x86/intel_sofia_3gr.c
@@ -0,0 +1,103 @@
+/*
+ * Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
+ * Copyright (c) 2015 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+
+#include "common.h"
+#include "x86/intel_sofia_3gr.h"
+
+#define PLATFORM_NAME "SoFIA 3GR"
+
+mraa_board_t*
+mraa_intel_sofia_3gr()
+{
+ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
+ if (b == NULL) {
+ return NULL;
+ }
+
+ b->platform_name = PLATFORM_NAME;
+ b->phy_pin_count = MRAA_INTEL_SOFIA_3GR_PINCOUNT;
+
+ b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
+ if (b->adv_func == NULL) {
+ goto error;
+ }
+
+ b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_SOFIA_3GR_PINCOUNT, sizeof(mraa_pininfo_t));
+ if (b->pins == NULL) {
+ free(b->adv_func);
+ goto error;
+ }
+
+ strncpy(b->pins[0].name, "I2C1SCL", 8);
+ b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[0].i2c.pinmap = 1;
+ b->pins[0].i2c.mux_total = 0;
+
+ strncpy(b->pins[1].name, "I2C1SDA", 8);
+ b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[1].i2c.pinmap = 1;
+ b->pins[1].i2c.mux_total = 0;
+
+ strncpy(b->pins[2].name, "I2C2SCL", 8);
+ b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[2].i2c.pinmap = 1;
+ b->pins[2].i2c.mux_total = 0;
+
+ strncpy(b->pins[3].name, "I2C2SDA", 8);
+ b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[3].i2c.pinmap = 1;
+ b->pins[3].i2c.mux_total = 0;
+
+ strncpy(b->pins[4].name, "I2C3SCL", 8);
+ b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[4].i2c.pinmap = 1;
+ b->pins[4].i2c.mux_total = 0;
+
+ strncpy(b->pins[5].name, "I2C3SDA", 8);
+ b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[5].i2c.pinmap = 1;
+ b->pins[5].i2c.mux_total = 0;
+
+ strncpy(b->pins[6].name, "I2C4SCL", 8);
+ b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[6].i2c.pinmap = 1;
+ b->pins[6].i2c.mux_total = 0;
+
+ strncpy(b->pins[7].name, "I2C4SDA", 8);
+ b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 };
+ b->pins[7].i2c.pinmap = 1;
+ b->pins[7].i2c.mux_total = 0;
+
+ return b;
+error:
+ syslog(LOG_CRIT, "SoFIA 3GR: Platform failed to initialise");
+ free(b);
+ return NULL;
+}
diff --git a/peripheral/libmraa/src/x86/x86.c b/peripheral/libmraa/src/x86/x86.c
index 4667264..57c4daf 100644
--- a/peripheral/libmraa/src/x86/x86.c
+++ b/peripheral/libmraa/src/x86/x86.c
@@ -1,6 +1,7 @@
/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
- * Copyright (c) 2014 Intel Corporation.
+ * Brendan Le Foll <brendan.le.foll@intel.com>
+ * Copyright (c) 2014-2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
@@ -33,6 +34,7 @@
#include "x86/intel_de3815.h"
#include "x86/intel_nuc5.h"
#include "x86/intel_minnow_byt_compatible.h"
+#include "x86/intel_sofia_3gr.h"
mraa_platform_t
mraa_x86_platform()
@@ -63,25 +65,39 @@ mraa_x86_platform()
plat = mraa_intel_nuc5();
} else if (strncmp(line, "NOTEBOOK", 8) == 0) {
platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
- plat = mraa_intel_minnowboard_byt_compatible();
+ plat = mraa_intel_minnowboard_byt_compatible(0);
} else if (strncasecmp(line, "MinnowBoard MAX", 15) == 0) {
platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
- plat = mraa_intel_minnowboard_byt_compatible();
+ plat = mraa_intel_minnowboard_byt_compatible(0);
} else if (strncasecmp(line, "Galileo", 7) == 0) {
platform_type = MRAA_INTEL_GALILEO_GEN1;
plat = mraa_intel_galileo_rev_d();
} else if (strncasecmp(line, "MinnowBoard Compatible", 22) == 0) {
- platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
- plat = mraa_intel_minnowboard_byt_compatible();
- } else {
+ platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
+ plat = mraa_intel_minnowboard_byt_compatible(1);
+ } else if (strncasecmp(line, "MinnowBoard Turbot", 18) == 0) {
+ platform_type = MRAA_INTEL_MINNOWBOARD_MAX;
+ plat = mraa_intel_minnowboard_byt_compatible(1);
+ } else {
syslog(LOG_ERR, "Platform not supported, not initialising");
platform_type = MRAA_UNKNOWN_PLATFORM;
}
free(line);
}
fclose(fh);
+ } else {
+ fh = fopen("/proc/cmdline", "r");
+ if (fh != NULL) {
+ if (getline(&line, &len, fh) != -1) {
+ if (strstr(line, "sf3gr_mrd_version=P2.0")) {
+ platform_type = MRAA_INTEL_SOFIA_3GR;
+ plat = mraa_intel_sofia_3gr();
+ }
+ free(line);
+ }
+ fclose(fh);
+ }
}
-
return platform_type;
#else
#if defined(xMRAA_INTEL_GALILEO_GEN2)
@@ -96,6 +112,8 @@ mraa_x86_platform()
plat = mraa_intel_galileo_rev_d();
#elif defined(xMRAA_INTEL_NUC5)
plat = mraa_intel_nuc5();
+ #elif defined(xMRAA_INTEL_SOFIA_3GR)
+ plat = mraa_intel_sofia_3gr();
#else
#error "Not using a valid platform value from mraa_platform_t - cannot compile"
#endif
diff --git a/peripheral/libmraa/tests/CMakeLists.txt b/peripheral/libmraa/tests/CMakeLists.txt
index 273b46d..6ebb8bd 100644
--- a/peripheral/libmraa/tests/CMakeLists.txt
+++ b/peripheral/libmraa/tests/CMakeLists.txt
@@ -1,9 +1,20 @@
-add_test (NAME py_general COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/general_checks.py)
-set_tests_properties(py_general PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+if (BUILDSWIGJAVA)
+ add_test (NAME check_clean COMMAND ${PYTHON_EXECUTABLE}
+ ${CMAKE_CURRENT_SOURCE_DIR}/check_clean.py
+ WORKING_DIRECTORY ${CMAKE_BINARY_DIR})
-add_test (NAME py_platform COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/platform_checks.py)
-set_tests_properties(py_platform PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+ add_test (NAME check_samplenames COMMAND ${PYTHON_EXECUTABLE}
+ ${CMAKE_CURRENT_SOURCE_DIR}/check_samplenames.py
+ WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
+endif()
-add_test (NAME py_gpio COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/gpio_checks.py)
-set_tests_properties(py_gpio PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+if (BUILDSWIGPYTHON)
+ add_test (NAME py_general COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/general_checks.py)
+ set_tests_properties(py_general PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+ add_test (NAME py_platform COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/platform_checks.py)
+ set_tests_properties(py_platform PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+
+ add_test (NAME py_gpio COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/gpio_checks.py)
+ set_tests_properties(py_gpio PROPERTIES ENVIRONMENT "PYTHONPATH=${CMAKE_BINARY_DIR}/src/python/")
+endif()
diff --git a/peripheral/libmraa/tests/check_clean.py b/peripheral/libmraa/tests/check_clean.py
new file mode 100644
index 0000000..7b47dc6
--- /dev/null
+++ b/peripheral/libmraa/tests/check_clean.py
@@ -0,0 +1,23 @@
+#!/usr/bin/python
+
+import unittest as u
+import re, fnmatch, os
+
+rootDir = 'src/java'
+swigtypeStr = 'SWIGTYPE'
+
+class Clean(u.TestCase):
+
+ def test_existing_swigtype(self):
+ unclean = []
+
+ for fileName in os.listdir(rootDir):
+ if swigtypeStr in fileName:
+ unclean.append(fileName)
+
+ self.assertEqual( len(unclean), 0,
+ "\nmraa contains unclean Java bindings:\n" + \
+ "\n".join(unclean) + "\n\n")
+
+if __name__ == '__main__':
+ u.main()
diff --git a/peripheral/libmraa/tests/check_samplenames.py b/peripheral/libmraa/tests/check_samplenames.py
new file mode 100644
index 0000000..75df165
--- /dev/null
+++ b/peripheral/libmraa/tests/check_samplenames.py
@@ -0,0 +1,64 @@
+#!/usr/bin/python
+
+import unittest as u
+import re, fnmatch, os, sys
+
+sampleMappingFile = '../examples/samples.mapping.txt'
+cSamplesDir = '../examples/'
+javaSamplesDir = '../examples/java/'
+cppSamplesDir = '../examples/c++/'
+
+class SampleNames(u.TestCase):
+
+ def test_existing_samples(self):
+ missing_c_files = []
+ missing_cpp_files = []
+ missing_java_files = []
+
+ with open (sampleMappingFile, "r") as f:
+ for line in f:
+ sampleNames = line.split();
+
+ cSampleName = sampleNames[0]
+ javaSampleName = sampleNames[1]
+
+ #check for C files
+ if cSampleName.endswith('.c'):
+ ok = False
+ for file in os.listdir(cSamplesDir):
+ if file == cSampleName:
+ ok = True
+ break
+ if not ok:
+ missing_c_files.append(cSampleName)
+
+ #check for Cpp files
+ if cSampleName.endswith('.cpp'):
+ ok = False
+ for file in os.listdir(cppSamplesDir):
+ if file == cSampleName:
+ ok = True
+ break
+ if not ok:
+ missing_cpp_files.append(cSampleName)
+
+ #check for java files
+ javaSampleName = javaSampleName.lstrip("java/")
+ if javaSampleName.endswith('.java'):
+ ok = False
+ for file in os.listdir(javaSamplesDir):
+ if file == javaSampleName:
+ ok = True
+ break
+ if not ok:
+ missing_java_files.append(javaSampleName)
+
+ self.assertEqual( len(missing_java_files) + len(missing_c_files) + len(missing_cpp_files), 0,
+ "\nThe following files are missing from samples:\n" + \
+ "\n".join(missing_c_files) + "\n" + \
+ "\n".join(missing_cpp_files) + "\n" + \
+ "\n".join(missing_java_files))
+
+if __name__ == '__main__':
+ u.main()
+