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| author | Richard Zhu <hongxing.zhu@nxp.com> | 2018-07-25 09:27:03 +0800 |
|---|---|---|
| committer | Neal Ostrem <nealo@google.com> | 2018-08-20 17:50:50 -0700 |
| commit | 35ad21e0fe284aa33d435534858ae232e757bf28 (patch) | |
| tree | f1bbc94003ac0e21bfd5ede43b0a2a4e835ec456 | |
| parent | 4bb05f708dd82d74eaa07b98a9902ba318b24546 (diff) | |
| download | imx-v4.9-35ad21e0fe284aa33d435534858ae232e757bf28.tar.gz | |
Revert "PCI/ASPM: Deal with missing root ports in link state handling"
This reverts commit 6213c714a580c34751f9501725369fc5e0fe71e5.
Test: Builds and boots successfully with other 18 CLs in this topic.
Change-Id: I28297c2d4a89d4193aa73617889305a013fff919
| -rw-r--r-- | drivers/pci/pcie/aspm.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index d6f263c620ab..92fdbc5b1f15 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -805,14 +805,10 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) /* * Root Ports and PCI/PCI-X to PCIe Bridges are roots of PCIe - * hierarchies. Note that some PCIe host implementations omit - * the root ports entirely, in which case a downstream port on - * a switch may become the root of the link state chain for all - * its subordinate endpoints. + * hierarchies. */ if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT || - pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE || - !pdev->bus->parent->self) { + pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE) { link->root = link; } else { struct pcie_link_state *parent; |