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Change-Id: I79b898ea5b882e8c0564e25466e827a9bedda6e8
Author: yhe19 <yunan.he@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
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Change-Id: I32d2e02814f1965ebdcecb804e947ff303dbe230
Author: Mark Gross <mark.gross@intel.com>
Signed-off-by: Bruce Beare <brucex.j.beare@intel.com>
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Reference results of the experiments on Qualcomm MSM7x25 (524MHz):
[original C code]
prc thr usecs/call samples errors cnt/samp
size
strcpy_1k 1 1 14.56159 99 0 1000
1024
[ARM optimized code]
prc thr usecs/call samples errors cnt/samp
size
strcpy_1k 1 1 3.46653 99 0 1000
1024
The work was derived from ARM Ltd.
Change-Id: I906ac53bb7a7285e14693c77d3ce8d4ed6f98bfd
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This patch fixes a known bug in bionic libm
due to aliasing issues in gcc 4.2 and 4.4; more
specifically in frexpf.
The function frexpf is used to extract the
mantissa and exponent from a double precision number.
The bug has already been reported here:
https://code.google.com/p/android/issues/detail?id=6697
Change-Id: I2e1f2e0a45906642d2225b9d150ed391d2bf331c
Signed-off-by: Rodrigo Obregon <robregon@ti.com>
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Originally, there are _rand48 (in libc/bionic/_rand48.c) and __rand48
(in libc/stdlib/_rand48.c) implemented in bionic. Besides the naming,
the functionality is identical. This patch removes the duplicated
_rand48. Also, drand48 and erand48 are modified accordingly.
Change-Id: Ie5761a0a97f45df8538222a77edacb7c3e0125d7
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Change-Id: I21e7ef6bf0bca288069275add43bd53294c0760d
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Change-Id: If99c5816fe6fa9107aa6bef4697048fabf92283f
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Thread-specific state for the stubs functions should not be exposed to
applications.
Change-Id: I4d35dab6009dab8db7781671ac5cc9b5f6904e84
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Change-Id: I98d9a5f736482e52904228c171a1bdefd2f5b213
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Change-Id: I988b83613e6252c0cc961555e81c10f856a38b37
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Change-Id: Iaaec7ea4d04c859fe98ad3331fd71e7d000c826b
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Although header libc/stdio/local.h declares the macros and private
variables of stdio, there are several internal symbols exposed
unexpectedly.
Change-Id: Ie7a07f85b70322fb9cd05b3c8e1bcc416061eb4b
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Change-Id: I80da2521c50df7e8967af48164cc834abf499c50
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
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Change-Id: If5c33d90b33f538448ac12e7bee94b4b9173d39c
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
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Change-Id: I22a600e7f172681cfd38ff73a64e3fd07b284959
Signed-off-by: Lu, Hongjiu <hongjiu.lu@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
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The change explicitly isolates the assembly-only macros in header
<machine/cpu-features.h> in order to prevent mis-inclusion in C/C++
source files.
Change-Id: I0258e87c5ac3fd24944fb227290ac3b9cac4bfba
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In order not to conflict with the symbols defined in file
libc/netbsd/getaddrinfo.c, this patch makes the internal/helper
functions static.
Change-Id: I0f85599e0b4ce0a637d005ff1680e1805dec4380
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Ideally __libc_android_abort would be static, but it could not be
because gcc would not allow calling a static function from an asm
statement. Instead, using GCC visibility is work around.
Change-Id: Ifff6b9957ca3f0fc03c75c3e42582a48d43cefa2
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1. Make the feature test work by excluding known-deficient processors, so
we don't have to maintain a complete list of all the processors that support
REV and REV16.
2. Don't abuse 'register' to get an effect similar to GCC's +l constraint,
but which was unnecessarily restrictive.
3. Fix __swap64md so _x isn't clobbered, breaking 64-bit swaps.
4. Make <byteswap.h> (which declars bswap_16 and friends) use <endian.h>
rather than <sys/endian.h>, so we get the machine-dependent implementations.
Change-Id: I6a38fad7a9fbe394aff141489617eb3883e1e944
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The __ARM_HAVE_LDREX_STREX define is used to replace
the swp instruction with ldrex/strex for ARM architecture
greater than 6 (armv6, armv7 etc.). However the include
file, cpu-features.h, which defines this flag was never
included.
Change-Id: Ia35e18e8b228ec830b2b42b08909515110753f18
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
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ARMv6 ISA has several instructions to handle data in different byte order.
For endian conversion (byte swapping) of single data words, it might be a
good idea to use the REV/REV16 instruction simply.
Change-Id: Ic4a5ed6254e082763e54aa70d428f59a0088636e
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The patch follows the naming manner in existing macros with prefix
__ARM_HAVE.
Change-Id: I6763ce2bf3ee85fd1da112c719543061d8d19bf4
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Setting libc_crt_target_cflags to be non-recursive is necessary.
Change-Id: I5310d86e705f23da126c21ecb33a97a074da584a
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Change-Id: Ie6c0bf593315d3507b3c4a6c8903a74a1fa053db
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The header file is needed to add route to an IPv6 host from user space
Change-Id: I25c8a8d8e48013f127542199bc027f976b9672c1
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clearenv() compiler warning and related comment typos"
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Change-Id: I22410b27939e8f54da932d7a1104102550c4685f
Signed-off-by: Bruce Beare <brucex.j.beare@intel.com>
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