Update emmc perf test tool

Drop caches before read tests.
Fix random read tests to read area big enough to prevent
the block cache from filling with the data being read.
Test with the read-ahead set to 4K, and at the default value.

Change-Id: Ifffa07fe4c89b6e103ce4fd71d0fa9881fed0dc7

2 files changed, 37 insertions, 4 deletions

diff --git a/tests/ext4/android_emmc_perf_tests.sh b/tests/ext4/android_emmc_perf_tests.sh
index 202c0951..c7fc4a55 100755
--- a/tests/ext4/android_emmc_perf_tests.sh
+++ b/tests/ext4/android_emmc_perf_tests.sh
@@ -18,11 +18,13 @@ case "$HARDWARE" in
   tuna | steelhead)
     CPUFREQ="/sys/devices/system/cpu/cpu0/cpufreq"
     CACHE="/dev/block/platform/omap/omap_hsmmc.0/by-name/cache"
+    MMCDEV="mmcblk0"
     ;;
 
   stingray | wingray)
     CPUFREQ="/sys/devices/system/cpu/cpu0/cpufreq"
     CACHE="/dev/block/platform/sdhci-tegra.3/by-name/cache"
+    MMCDEV="mmcblk0"
     ;;
 
   herring)
@@ -37,16 +39,19 @@ case "$HARDWARE" in
 
     CPUFREQ="/sys/devices/system/cpu/cpu0/cpufreq"
     CACHE="/dev/block/platform/s3c-sdhci.0/by-name/userdata"
+    MMCDEV="mmcblk0"
     ;;
 
   grouper)
     CPUFREQ="/sys/devices/system/cpu/cpu0/cpufreq"
     CACHE="/dev/block/platform/sdhci-tegra.3/by-name/CAC"
+    MMCDEV="mmcblk0"
     ;;
 
   manta)
     CPUFREQ="/sys/devices/system/cpu/cpu0/cpufreq"
     CACHE="/dev/block/platform/dw_mmc.0/by-name/cache"
+    MMCDEV="mmcblk0"
     ;;
 
   *)
@@ -67,7 +72,11 @@ adb shell stop keystore
 adb shell stop tf_daemon
 adb shell stop bluetoothd
 adb shell stop hciattach
+adb shell stop p2p_supplicant
+adb shell stop wpa_supplicant
+adb shell stop mobicore
 adb shell umount /sdcard >/dev/null 2>&1
+adb shell umount /mnt/shell/sdcard0 >/dev/null 2>&1
 adb shell umount /data >/dev/null 2>&1
 adb shell umount /cache >/dev/null 2>&1
 # Add more services here that other devices need to stop.
@@ -84,6 +93,7 @@ adb shell "cat $CPUFREQ/cpuinfo_max_freq > $CPUFREQ/scaling_min_freq"
 # Sequential read test
 for I in 1 2 3
 do
+  adb shell "echo 3 > /proc/sys/vm/drop_caches"
   echo "Sequential read test $I"
   adb shell dd if="$CACHE" of=/dev/null bs=1048576 count=200
 done
@@ -95,12 +105,35 @@ do
   adb shell dd if=/dev/zero of="$CACHE" bs=1048576 count=200
 done
 
-# Random read test
+# Random read tests require that we read from a much larger range of offsets
+# into the emmc chip than the write test.  If we only read though 100 Megabytes
+# (and with a read-ahead of 128K), we quickly fill the buffer cache with 100
+# Megabytes of data, and subsequent reads are nearly instantaneous.  Since
+# reading is non-destructive, and we've never shipped a device with less than
+# 8 Gbytes, for this test we read from the raw emmc device, and randomly seek
+# in the first 6 Gbytes.  That is way more memory than any device we currently
+# have and it should keep the cache from being poluted with entries from
+# previous random reads.
+#
+# Also, test with the read-ahead set very low at 4K, and at the default
+
+# Random read test, 4K read-ahead
+ORIG_READAHEAD=`adb shell cat /sys/block/$MMCDEV/queue/read_ahead_kb | tr -d "\r"`
+adb shell "echo 4 > /sys/block/$MMCDEV/queue/read_ahead_kb"
+for I in 1 2 3
+do
+  adb shell "echo 3 > /proc/sys/vm/drop_caches"
+  echo "Random read (4K read-ahead) test $I"
+  adb shell /dev/"$PERF" -r 6000 "/dev/block/$MMCDEV"
+done
+
+# Random read test, default read-ahead
+adb shell "echo $ORIG_READAHEAD > /sys/block/$MMCDEV/queue/read_ahead_kb"
 for I in 1 2 3
 do
   adb shell "echo 3 > /proc/sys/vm/drop_caches"
-  echo "Random read test $I"
-  adb shell /dev/"$PERF" -r 100 "$CACHE"
+  echo "Random read (default read-ahead of ${ORIG_READAHEAD}K) test $I"
+  adb shell /dev/"$PERF" -r 6000 "/dev/block/$MMCDEV"
 done
 
 # Random write test
diff --git a/tests/ext4/rand_emmc_perf.c b/tests/ext4/rand_emmc_perf.c
index 1f79c753..9c633369 100644
--- a/tests/ext4/rand_emmc_perf.c
+++ b/tests/ext4/rand_emmc_perf.c
@@ -41,7 +41,7 @@ static void usage(void) {
 
 int main(int argc, char *argv[])
 {
-    long max_blocks;
+    unsigned long long max_blocks;
     int fd, fd2, write_mode = 0, iops = 0;
     struct timeval start, end, res;
     unsigned int seed;