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authorChris Lu <luchris@google.com>2023-10-19 12:05:27 +0000
committerChris Lu <luchris@google.com>2023-10-25 03:46:06 +0000
commit6f886b5114767dd8d09b68a163f411f11c925b02 (patch)
tree8a02e7f5b92b49813df387cec96670a1755a497c
parentda540cea7ac4695f25041a811e960bc624268e60 (diff)
downloadshusky-android-gs-shusky-5.15-android14-qpr1-beta.tar.gz
We should not change DBV while entering AOD mode since the gamma is tuned separately for normal and AOD modes. Instead, we should set the DBV while display is off and before entering AOD mode. Bug: 305878826 Test: cover prox sensor and test OFF<->AOD Test: enter/exit AOD mode, switch AOD brightness Change-Id: I14f79b66ec1941845f9752dd781a7d980f8c693f Signed-off-by: Chris Lu <luchris@google.com>
-rw-r--r--display/panel-google-hk3.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/display/panel-google-hk3.c b/display/panel-google-hk3.c
index 239d2c7..a6d53a6 100644
--- a/display/panel-google-hk3.c
+++ b/display/panel-google-hk3.c
@@ -132,7 +132,7 @@ struct hk3_panel {
bool force_changeable_te2;
/** @hw_acl_setting: automatic current limiting setting */
u8 hw_acl_setting;
- /** @hw_dbv: indicate the current dbv */
+ /** @hw_dbv: indicate the current dbv, will be zero after sleep in/out */
u16 hw_dbv;
/** @hw_za_enabled: whether zonal attenuation is enabled */
bool hw_za_enabled;
@@ -319,7 +319,8 @@ static const u8 sync_begin[] = { 0xE4, 0x00, 0x2C, 0x2C, 0xA2, 0x00, 0x00 };
static const u8 sync_end[] = { 0xE4, 0x00, 0x2C, 0x2C, 0x82, 0x00, 0x00 };
static const u8 aod_on[] = { MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24 };
static const u8 aod_off[] = { MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20 };
-static const u8 min_dbv[] = { MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x00, 0x04 };
+/* 50 nits */
+static const u8 aod_dbv[] = { MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x03, 0x55 };
static const struct exynos_dsi_cmd hk3_lp_low_cmds[] = {
EXYNOS_DSI_CMD0(unlock_cmd_f0),
@@ -327,7 +328,6 @@ static const struct exynos_dsi_cmd hk3_lp_low_cmds[] = {
EXYNOS_DSI_CMD_SEQ(0xB0, 0x00, 0x52, 0x94),
EXYNOS_DSI_CMD_SEQ(0x94, 0x01, 0x07, 0x6A, 0x02),
EXYNOS_DSI_CMD0(lock_cmd_f0),
- EXYNOS_DSI_CMD0(min_dbv),
};
static const struct exynos_dsi_cmd hk3_lp_high_cmds[] = {
@@ -336,7 +336,6 @@ static const struct exynos_dsi_cmd hk3_lp_high_cmds[] = {
EXYNOS_DSI_CMD_SEQ(0xB0, 0x00, 0x52, 0x94),
EXYNOS_DSI_CMD_SEQ(0x94, 0x00, 0x07, 0x6A, 0x02),
EXYNOS_DSI_CMD0(lock_cmd_f0),
- EXYNOS_DSI_CMD0(min_dbv),
};
static const struct exynos_binned_lp hk3_binned_lp[] = {
@@ -1417,7 +1416,7 @@ static void hk3_set_lp_mode(struct exynos_panel *ctx, const struct exynos_panel_
DPU_ATRACE_BEGIN(__func__);
hk3_disable_panel_feat(ctx, vrefresh);
- if (panel_enabled) {
+ if (panel_enabled) {
/* init sequence has sent display-off command already */
if (!hk3_is_peak_vrefresh(vrefresh, is_ns) && is_changeable_te)
hk3_wait_for_vsync_done_changeable(ctx, vrefresh, is_ns);
@@ -1425,6 +1424,8 @@ static void hk3_set_lp_mode(struct exynos_panel *ctx, const struct exynos_panel_
hk3_wait_for_vsync_done(ctx, vrefresh, is_ns);
exynos_panel_send_cmd_set(ctx, &hk3_display_off_cmd_set);
}
+ /* display should be off here, set dbv before entering lp mode */
+ EXYNOS_DCS_BUF_ADD_SET_AND_FLUSH(ctx, aod_dbv);
hk3_wait_for_vsync_done(ctx, vrefresh, false);
EXYNOS_DCS_BUF_ADD_SET_AND_FLUSH(ctx, aod_on);