Snap for 11526323 from 3260cef08141c92528376cf3b68cd905a4b9d1dc to simpleperf-releasesimpleperf-release

Change-Id: Id340178ddb57666596473f58f42ba987538035ff

5 files changed, 232 insertions, 26 deletions

diff --git a/guest_state/Android.bp b/guest_state/Android.bp
new file mode 100644
index 0000000..c8173b2
--- /dev/null
+++ b/guest_state/Android.bp
@@ -0,0 +1,25 @@
+// Copyright (C) 2024 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_library_headers {
+    name: "native_bridge_guest_state_headers",
+    defaults: ["native_bridge_support_defaults"],
+    host_supported: true,
+    export_include_dirs: ["include"],
+}
diff --git a/guest_state/include/native_bridge_support/arm/guest_state/guest_state_cpu_state.h b/guest_state/include/native_bridge_support/arm/guest_state/guest_state_cpu_state.h
new file mode 100644
index 0000000..e96660a
--- /dev/null
+++ b/guest_state/include/native_bridge_support/arm/guest_state/guest_state_cpu_state.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2024 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef NATIVE_BRIDGE_SUPPORT_ARM_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+#define NATIVE_BRIDGE_SUPPORT_ARM_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+
+namespace berberis {
+
+using GuestAddr = uintptr_t;
+using Reservation = uint64_t;
+
+// Guest CPU state.
+struct CPUState {
+  // General registers, except PC (r15).
+  uint32_t r[15];
+
+  // ATTENTION: flag values should only be 0 or 1, for bitwise computations!
+  // This is different from 'bool', where 'true' can be any non-zero value!
+  struct Flags {
+    uint8_t negative;
+    uint8_t zero;
+    uint8_t carry;
+    uint8_t overflow;
+    uint32_t saturation;
+    // Greater than or equal flags in SIMD-friendly format: 4 bytes, each either 0x00 or 0xff.
+    // That's format produced by SIMD instructions (e.g. PCMPGTB/etc on x86 and VCGT/etc on ARM).
+    uint32_t ge;
+  } flags;
+
+  // Current insn address, +1 if Thumb.
+  uint32_t insn_addr;
+
+  // Advanced SIMD and floating-point registers (s, d, q).
+  // Have to be aligned (relative to structure start) to allow optimizer
+  // determine 128-bit container for 64-bit element.
+  alignas(128 / CHAR_BIT) uint64_t d[32];
+
+  // See intrinsics/guest_fp_flags.h for the information about that word.
+  // Intrinsics touch separate bits of that word, the rest uses it as opaque 32-bit data structure.
+  //
+  // Exception: SemanticsDecoder::VMRS accesses four bits directly without intrinsics.
+  uint32_t fpflags;
+
+  GuestAddr reservation_address;
+  Reservation reservation_value;
+};
+
+}
+#endif  // NATIVE_BRIDGE_SUPPORT_ARM_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
\ No newline at end of file
diff --git a/guest_state/include/native_bridge_support/arm64/guest_state/guest_state_cpu_state.h b/guest_state/include/native_bridge_support/arm64/guest_state/guest_state_cpu_state.h
new file mode 100644
index 0000000..2ac723b
--- /dev/null
+++ b/guest_state/include/native_bridge_support/arm64/guest_state/guest_state_cpu_state.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2024 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef NATIVE_BRIDGE_SUPPORT_ARM64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+#define NATIVE_BRIDGE_SUPPORT_ARM64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+
+namespace berberis {
+
+using GuestAddr = uintptr_t;
+using Reservation = __uint128_t;
+
+struct CPUState {
+  // General registers.
+  uint64_t x[31];
+
+  // Flags
+  // clang-format off
+  enum FlagMask {
+    kFlagNegative = 1 << 15,
+    kFlagZero     = 1 << 14,
+    kFlagCarry    = 1 << 8,
+    kFlagOverflow = 1,
+  };
+
+  static constexpr uint32_t kFpsrQcBit = 1U << 27;
+
+  // clang-format on
+  uint16_t flags;
+
+  // Caches last-written FPCR, to minimize reads of host register
+  uint32_t cached_fpcr;
+
+  // Stores the FPSR flags whose functionality we emulate: currently only IDC. (later IXC)
+  uint32_t emulated_fpsr;
+
+  // Stack pointer.
+  uint64_t sp;
+
+  // SIMD & FP registers.
+  alignas(16) __uint128_t v[32];
+
+  // Current insn address.
+  uint64_t insn_addr;
+
+  GuestAddr reservation_address;
+  Reservation reservation_value;
+};
+
+}
+#endif  // NATIVE_BRIDGE_SUPPORT_BRIDGE_SUPPORT_ARM64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
\ No newline at end of file
diff --git a/guest_state/include/native_bridge_support/riscv64/guest_state/guest_state_cpu_state.h b/guest_state/include/native_bridge_support/riscv64/guest_state/guest_state_cpu_state.h
new file mode 100644
index 0000000..a6c8f16
--- /dev/null
+++ b/guest_state/include/native_bridge_support/riscv64/guest_state/guest_state_cpu_state.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2024 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef NATIVE_BRIDGE_SUPPORT_RISCV64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+#define NATIVE_BRIDGE_SUPPORT_RISCV64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
+
+namespace berberis {
+
+using GuestAddr = uintptr_t;
+using Reservation = uint64_t;
+
+struct CPUState {
+  // x0 to x31.
+  uint64_t x[32];
+  // f0 to f31. We are using uint64_t because C++ may change values of NaN when they are passed from
+  // or to function and RISC-V uses NaN-boxing which would make things problematic.
+  uint64_t f[32];
+  // v0 to v32. We only support 128bit vectors for now.
+  alignas(16) __uint128_t v[32];
+
+  GuestAddr insn_addr;
+
+  GuestAddr reservation_address;
+  Reservation reservation_value;
+
+  // Technically only 9 bits are defined: sign bit and 8 low bits.
+  // But for performance reason it's easier to keep full 64bits in this variable.
+  uint64_t vtype;
+  // This register usually contains zero and each vector instruction would reset it to zero.
+  // But it's allowed to change it and if that happens we are supposed to support it.
+  uint8_t vstart;
+  // This register is usually set to process full 128 bits set of SIMD data.
+  // But it's allowed to change it and if that happens we are supposed to support it.
+  uint8_t vl;
+  // Only 3 bits are defined but we allocate full byte to simplify implementation.
+  uint8_t vcsr;
+  // RISC-V has five rounding modes, while x86-64 has only four.
+  //
+  // Extra rounding mode (RMM in RISC-V documentation) is emulated but requires the use of
+  // FE_TOWARDZERO mode for correct work.
+  //
+  // Additionally RISC-V implementation is supposed to support three “illegal” rounding modes and
+  // when they are selected all instructions which use rounding mode trigger “undefined instruction”
+  // exception.
+  //
+  // For simplicity we always keep full rounding mode (3 bits) in the frm field and set host
+  // rounding mode to appropriate one.
+  //
+  // Exceptions, on the other hand, couldn't be stored here efficiently, instead we rely on the fact
+  // that x86-64 implements all five exceptions that RISC-V needs (and more).
+  uint8_t frm;
+};
+
+}
+#endif  // NATIVE_BRIDGE_SUPPORT_RISCV64_GUEST_STATE_GUEST_STATE_CPU_STATE_H_
\ No newline at end of file
diff --git a/guest_state_accessor/include/native_bridge_support/guest_state_accessor/accessor.h b/guest_state_accessor/include/native_bridge_support/guest_state_accessor/accessor.h
index d4a8eee..6a0ec37 100644
--- a/guest_state_accessor/include/native_bridge_support/guest_state_accessor/accessor.h
+++ b/guest_state_accessor/include/native_bridge_support/guest_state_accessor/accessor.h
@@ -18,6 +18,7 @@
 #define NATIVE_BRIDGE_SUPPORT_GUEST_STATE_ACCESSOR_H_
 
 #include <stdalign.h>
+#include <stddef.h>
 #include <stdint.h>
 #include <sys/cdefs.h>
 
@@ -58,7 +59,7 @@ struct NativeBridgeGuestRegsArm {
 //
 // Note that 64bit architectures are only supported for 64bit host platform.
 struct NativeBridgeGuestRegs {
-  uint64_t arch;
+  uint64_t guest_arch;
   union {
 #if defined(__LP64__)
     NativeBridgeGuestRegsArm64 regs_arm64;
@@ -69,10 +70,7 @@ struct NativeBridgeGuestRegs {
 };
 
 // Signature value for NativeBridgeGuestStateHeader::signature
-#define NATIVE_BRIDGE_GUEST_STATE_SIGNATURE 0x4E424753
-
-// List of native bridge providers
-#define NATIVE_BRIDGE_PROVIDER_BERBERIS 7
+#define NATIVE_BRIDGE_GUEST_STATE_SIGNATURE 0x5349'5245'4252'4542
 
 // This is the header of guest_state, pointer to which is stored in
 // TLS_SLOT_NATIVE_BRIDGE_GUEST_STATE and accessed by android debuggerd
@@ -80,25 +78,16 @@ struct NativeBridgeGuestRegs {
 struct alignas(16) NativeBridgeGuestStateHeader {
   // Guest state signature for initial check must always be
   // equal to NATIVE_BRIDGE_GUEST_STATE_SIGNATURE
-  uint32_t signature;
-  // Native bridge implementation provider id
-  uint32_t native_bridge_provider_id;
+  uint64_t signature;
   // Guest and host architectures: defined as NATIVE_BRIDGE_ARCH_*
   uint32_t native_bridge_host_arch;
   uint32_t native_bridge_guest_arch;
-  // Version (for internal use - can be bumped when internal representation
-  // of the guest state changes).
-  uint32_t version;
-  // Do not use (they are here to keep guest_state_data following this header
-  // aligned to 16bytes).
-  uint32_t reserved1;
-  uint32_t reserved2;
-  // Size of implementation specific representation of the guest state.
-  // The size is used by debugging/crash reporting tools to copy
+  // The pointer and size are used by debugging/crash reporting tools to copy
   // the state from a (probably crashed) process.
-  uint32_t guest_state_size;
-  // the implementation specific guest state must follow the header
-  // uint8_t guest_state_data[guest_state_size]
+  // The pointer to the implementation specific guest state.
+  const void* guest_state_data;
+  // Size of implementation specific representation of the guest state.
+  size_t guest_state_data_size;
 };
 
 // Unsupported combination of guest and host architectures
@@ -114,12 +103,11 @@ struct alignas(16) NativeBridgeGuestStateHeader {
 // `guest_regs` structure with values from internal representation of
 // the guest state.
 //
-// Note that this function expects the implementation specific guest state
-// to follow the header.
-int LoadGuestStateRegisters(
-    const NativeBridgeGuestStateHeader* guest_state_header,
-    NativeBridgeGuestRegs* guest_regs);
+// `guest_state_data` points to the implementation specific guest_state
+int LoadGuestStateRegisters(const void* guest_state_data,
+                            size_t guest_state_data_size,
+                            NativeBridgeGuestRegs* guest_regs);
 
 __END_DECLS
 
-#endif  // NATIVE_BRIDGE_SUPPORT_GUEST_STATE_ACCESSOR_H_
\ No newline at end of file
+#endif  // NATIVE_BRIDGE_SUPPORT_GUEST_STATE_ACCESSOR_H_