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+/*******************************************************************************
+* Copyright 2015-2018 Intel Corporation
+* All Rights Reserved.
+*
+* If this software was obtained under the Intel Simplified Software License,
+* the following terms apply:
+*
+* The source code, information and material ("Material") contained herein is
+* owned by Intel Corporation or its suppliers or licensors, and title to such
+* Material remains with Intel Corporation or its suppliers or licensors. The
+* Material contains proprietary information of Intel or its suppliers and
+* licensors. The Material is protected by worldwide copyright laws and treaty
+* provisions. No part of the Material may be used, copied, reproduced,
+* modified, published, uploaded, posted, transmitted, distributed or disclosed
+* in any way without Intel's prior express written permission. No license under
+* any patent, copyright or other intellectual property rights in the Material
+* is granted to or conferred upon you, either expressly, by implication,
+* inducement, estoppel or otherwise. Any license under such intellectual
+* property rights must be express and approved by Intel in writing.
+*
+* Unless otherwise agreed by Intel in writing, you may not remove or alter this
+* notice or any other notice embedded in Materials by Intel or Intel's
+* suppliers or licensors in any way.
+*
+*
+* If this software was obtained under the Apache License, Version 2.0 (the
+* "License"), the following terms apply:
+*
+* You may not use this file except in compliance with the License. You may
+* obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
+*
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+*
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+/*
+//
+// Purpose:
+// Cryptography Primitive.
+// AES-SIV Functions (RFC 5297)
+//
+// Contents:
+// Stuff()
+//
+*/
+
+#include "owndefs.h"
+#include "owncp.h"
+#include "pcpcmac.h"
+#include "pcpaesm.h"
+#include "pcptool.h"
+
+#if !defined(_PCP_AES_SIV_STUFF_H_)
+
+#define _PCP_AES_SIV_STUFF_H_
+////////////////////////////////////////////////////////////
+__INLINE void cpAES_CMAC(Ipp8u mac[MBS_RIJ128], const Ipp8u* pSrc, int len, IppsAES_CMACState* pCtx)
+{
+ ippsAES_CMACUpdate(pSrc, len, pCtx);
+ ippsAES_CMACFinal(mac, MBS_RIJ128, pCtx);
+}
+__INLINE IppStatus cpAES_S2V_init(Ipp8u v[MBS_RIJ128], const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pCtx, int ctxSize)
+{
+ IppStatus sts = ippsAES_CMACInit(pKey, keyLen, pCtx, ctxSize);
+ if(ippStsNoErr==sts) {
+ PaddBlock(0, v, MBS_RIJ128);
+ cpAES_CMAC(v, v, MBS_RIJ128, pCtx);
+ }
+ return sts;
+}
+__INLINE Ipp8u* double16(Ipp8u out[MBS_RIJ128], const Ipp8u inp[MBS_RIJ128])
+{
+ /* double inp */
+ Ipp32u carry = 0;
+ int n;
+ for(n=0; n<MBS_RIJ128; n++) {
+ Ipp32u x = inp[MBS_RIJ128-1-n] + inp[MBS_RIJ128-1-n] + carry;
+ out[MBS_RIJ128-1-n] = (Ipp8u)x;
+ carry = (x>>8) & 0xFF;
+ }
+
+ out[MBS_RIJ128-1] ^= ((Ipp8u)(0-carry) & 0x87);
+ return out;
+}
+__INLINE void cpAES_S2V_update(Ipp8u v[MBS_RIJ128], const Ipp8u* pSrc, int len, IppsAES_CMACState* pCtx)
+{
+ Ipp8u t[MBS_RIJ128];
+ cpAES_CMAC(t, pSrc, len, pCtx);
+ double16(v, v);
+ XorBlock16(v, t, v);
+}
+
+static void cpAES_S2V_final(Ipp8u v[MBS_RIJ128], const Ipp8u* pSrc, int len, IppsAES_CMACState* pCtx)
+{
+ Ipp8u t[MBS_RIJ128];
+
+ if(len>=MBS_RIJ128) {
+ ippsAES_CMACUpdate(pSrc, len-MBS_RIJ128, pCtx);
+ XorBlock16(pSrc+len-MBS_RIJ128, v, t);
+ }
+ else {
+ double16(t, v);
+ XorBlock(pSrc, t, t, len);
+ t[len] ^= 0x80;
+ }
+ cpAES_CMAC(v, t, MBS_RIJ128, pCtx);
+}
+
+#endif /*_PCP_AES_SIV_STUFF_H_*/